arch: arm: Fix 10.4 violations

Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.

Signed-off-by: Flavio Ceolin <[email protected]>

Author: Flavio Ceolin

arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c

@@ -455,7 +455,7 @@ static inline int is_in_region(uint32_t r_index, uint32_t start, uint32_t size)
 	r_addr_start = SYSMPU->WORD[r_index][0];
 	r_addr_end = SYSMPU->WORD[r_index][1];
 
-	size = size == 0 ? 0 : size - 1;
+	size = size == 0U ? 0U : size - 1U;
 	if (u32_add_overflow(start, size, &end)) {
 		return 0;
 	}

arch/arm/core/aarch32/cortex_m/timing.c

@@ -117,5 +117,5 @@ uint64_t arch_timing_cycles_to_ns_avg(uint64_t cycles, uint32_t count)
 
 uint32_t arch_timing_freq_get_mhz(void)
 {
-	return (uint32_t)(arch_timing_freq_get() / 1000000);
+	return (uint32_t)(arch_timing_freq_get() / 1000000U);
 }

arch/arm64/core/mmu.c

@@ -36,9 +36,9 @@ static uint64_t *new_table(void)
 	unsigned int i;
 
 	/* Look for a free table. */
-	for (i = 0; i < CONFIG_MAX_XLAT_TABLES; i++) {
-		if (xlat_use_count[i] == 0) {
-			xlat_use_count[i] = 1;
+	for (i = 0U; i < CONFIG_MAX_XLAT_TABLES; i++) {
+		if (xlat_use_count[i] == 0U) {
+			xlat_use_count[i] = 1U;
 			return &xlat_tables[i * Ln_XLAT_NUM_ENTRIES];
 		}
 	}
@@ -61,8 +61,8 @@ static void free_table(uint64_t *table)
 	unsigned int i = table_index(table);
 
 	MMU_DEBUG("freeing table [%d]%p\n", i, table);
-	__ASSERT(xlat_use_count[i] == 1, "table still in use");
-	xlat_use_count[i] = 0;
+	__ASSERT(xlat_use_count[i] == 1U, "table still in use");
+	xlat_use_count[i] = 0U;
 }
 
 /* Adjusts usage count and returns current count. */
@@ -114,7 +114,7 @@ static inline bool is_desc_superset(uint64_t desc1, uint64_t desc2,
 #if DUMP_PTE
 static void debug_show_pte(uint64_t *pte, unsigned int level)
 {
-	MMU_DEBUG("%.*s", level * 2, ". . . ");
+	MMU_DEBUG("%.*s", level * 2U, ". . . ");
 	MMU_DEBUG("[%d]%p: ", table_index(pte), pte);
 
 	if (is_free_desc(*pte)) {
@@ -194,7 +194,7 @@ static uint64_t *expand_to_table(uint64_t *pte, unsigned int level)
 		}
 
 		stride_shift = LEVEL_TO_VA_SIZE_SHIFT(level + 1);
-		for (i = 0; i < Ln_XLAT_NUM_ENTRIES; i++) {
+		for (i = 0U; i < Ln_XLAT_NUM_ENTRIES; i++) {
 			table[i] = desc | (i << stride_shift);
 		}
 		table_usage(table, Ln_XLAT_NUM_ENTRIES);
@@ -405,13 +405,13 @@ static void discard_table(uint64_t *table, unsigned int level)
 {
 	unsigned int i;
 
-	for (i = 0; Ln_XLAT_NUM_ENTRIES; i++) {
+	for (i = 0U; Ln_XLAT_NUM_ENTRIES; i++) {
 		if (is_table_desc(table[i], level)) {
 			table_usage(pte_desc_table(table[i]), -1);
 			discard_table(pte_desc_table(table[i]), level + 1);
 		}
 		if (!is_free_desc(table[i])) {
-			table[i] = 0;
+			table[i] = 0U;
 			table_usage(table, -1);
 		}
 	}
@@ -510,7 +510,7 @@ static int globalize_page_range(struct arm_mmu_ptables *dst_pt,
 static uint64_t get_region_desc(uint32_t attrs)
 {
 	unsigned int mem_type;
-	uint64_t desc = 0;
+	uint64_t desc = 0U;
 
 	/* NS bit for security memory access from secure state */
 	desc |= (attrs & MT_NS) ? PTE_BLOCK_DESC_NS : 0;
@@ -688,10 +688,10 @@ static void setup_page_tables(struct arm_mmu_ptables *ptables)
 	uintptr_t max_va = 0, max_pa = 0;
 
 	MMU_DEBUG("xlat tables:\n");
-	for (index = 0; index < CONFIG_MAX_XLAT_TABLES; index++)
+	for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++)
 		MMU_DEBUG("%d: %p\n", index, xlat_tables + index * Ln_XLAT_NUM_ENTRIES);
 
-	for (index = 0; index < mmu_config.num_regions; index++) {
+	for (index = 0U; index < mmu_config.num_regions; index++) {
 		region = &mmu_config.mmu_regions[index];
 		max_va = MAX(max_va, region->base_va + region->size);
 		max_pa = MAX(max_pa, region->base_pa + region->size);
@@ -703,7 +703,7 @@ static void setup_page_tables(struct arm_mmu_ptables *ptables)
 		 "Maximum PA not supported\n");
 
 	/* setup translation table for zephyr execution regions */
-	for (index = 0; index < ARRAY_SIZE(mmu_zephyr_ranges); index++) {
+	for (index = 0U; index < ARRAY_SIZE(mmu_zephyr_ranges); index++) {
 		range = &mmu_zephyr_ranges[index];
 		add_arm_mmu_flat_range(ptables, range, 0);
 	}
@@ -712,7 +712,7 @@ static void setup_page_tables(struct arm_mmu_ptables *ptables)
 	 * Create translation tables for user provided platform regions.
 	 * Those must not conflict with our default mapping.
 	 */
-	for (index = 0; index < mmu_config.num_regions; index++) {
+	for (index = 0U; index < mmu_config.num_regions; index++) {
 		region = &mmu_config.mmu_regions[index];
 		add_arm_mmu_region(ptables, region, MT_NO_OVERWRITE);
 	}
@@ -787,7 +787,7 @@ static sys_slist_t domain_list;
  */
 void z_arm64_mmu_init(void)
 {
-	unsigned int flags = 0;
+	unsigned int flags = 0U;
 
 	__ASSERT(CONFIG_MMU_PAGE_SIZE == KB(4),
 		 "Only 4K page size is supported\n");

arch/arm64/core/prep_c.c

@@ -31,7 +31,7 @@ static inline void z_arm64_bss_zero(void)
 	uint64_t *end = (uint64_t *)__bss_end;
 
 	while (p < end) {
-		*p++ = 0;
+		*p++ = 0U;
 	}
 }