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WorldofJARcraft
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fabiobaltieri
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llext: Add RISC-V arch-specific relocations
This commit introduces architecture-specific ELF relocations for RISC-V, in accordance with the RISC-V PSABI specification: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc Also, the necessary compiler configurations for compiling LLEXT extensions on RISC-V are added, and the llext tests are executed on RISC-V targets. Calling llext extensions from user threads in RISC-V is still unsupported as of this commit. Signed-off-by: Eric Ackermann <[email protected]>
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‎arch/riscv/core/CMakeLists.txt

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@@ -27,3 +27,4 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE userspace.S)
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zephyr_library_sources_ifdef(CONFIG_SEMIHOST semihost.c)
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zephyr_library_sources_ifdef(CONFIG_ARCH_STACKWALK stacktrace.c)
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zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)
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zephyr_library_sources_ifdef(CONFIG_LLEXT elf.c)

‎arch/riscv/core/elf.c

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/** @file
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* @brief Architecture-specific relocations for RISC-V instruction sets.
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*/
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/*
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* Copyright (c) 2024 CISPA Helmholtz Center for Information Security gGmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/llext/elf.h>
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#include <zephyr/llext/llext.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/arch/riscv/elf.h>
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#include <stdlib.h>
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LOG_MODULE_REGISTER(elf, CONFIG_LLEXT_LOG_LEVEL);
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/*
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* RISC-V relocations commonly use pairs of U-type and I-type instructions.
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* U-type instructions have 20-bit immediates, I-type instructions have 12-bit immediates.
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* Immediates in RISC-V are always sign-extended.
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* Thereby, this type of relocation can reach any address within a 2^31-1 byte range.
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*/
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#define RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE INT32_MAX
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/* S-type has 12-bit signed immediate */
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#define RISCV_MAX_JUMP_DISTANCE_S_TYPE ((1 << 11) - 1)
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/* I-type has 12-bit signed immediate also */
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#define RISCV_MAX_JUMP_DISTANCE_I_TYPE ((1 << 11) - 1)
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/* B-type has 13-bit signed immediate */
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#define RISCV_MAX_JUMP_DISTANCE_B_TYPE ((1 << 12) - 1)
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/* CB-type has 9-bit signed immediate */
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#define RISCV_MAX_JUMP_DISTANCE_CB_TYPE ((1 << 8) - 1)
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/* CJ-type has 12-bit signed immediate (last bit implicit 0) */
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#define RISCV_MAX_JUMP_DISTANCE_CJ_TYPE ((1 << 11) - 1)
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static inline int riscv_relocation_fits(long long jump_target, long long max_distance,
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elf_word reloc_type)
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{
46+
if (llabs(jump_target) > max_distance) {
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LOG_ERR("%lld byte relocation is not possible for type %" PRIu64 " (max %lld)!",
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jump_target, (uint64_t)reloc_type, max_distance);
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return -ENOEXEC; /* jump too far */
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}
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return 0;
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}
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static long long last_u_type_jump_target;
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/**
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* @brief RISC-V specific function for relocating partially linked ELF binaries
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*
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* This implementation follows the official RISC-V specification:
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* https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
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*
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*/
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int arch_elf_relocate(elf_rela_t *rel, uintptr_t loc_unsigned, uintptr_t sym_base_addr_unsigned,
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const char *sym_name, uintptr_t load_bias)
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{
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/* FIXME currently, RISC-V relocations all fit in ELF_32_R_TYPE */
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elf_word reloc_type = ELF32_R_TYPE(rel->r_info);
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/*
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* The RISC-V specification uses the following symbolic names for the relocations:
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*
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* A - addend (rel->r_addend)
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* B - base address (load_bias)
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* G - global offset table (not supported yet)
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* P - position of the relocation (loc)
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* S - symbol value (sym_base_addr)
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* V - value at the relocation position (*loc)
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* GP - value of __global_pointer$ (not supported yet)
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* TLSMODULE - TLS module for the object (not supported yet)
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* TLSOFFSET - TLS static block for the object (not supported yet)
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*/
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intptr_t loc = (intptr_t)loc_unsigned;
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uint8_t *loc8 = (uint8_t *)loc, tmp8;
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uint16_t *loc16 = (uint16_t *)loc, tmp16;
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uint32_t *loc32 = (uint32_t *)loc, tmp32;
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uint64_t *loc64 = (uint64_t *)loc, tmp64;
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/* uint32_t or uint64_t */
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r_riscv_wordclass_t *loc_word = (r_riscv_wordclass_t *)loc;
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uint32_t modified_operand;
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uint16_t modified_compressed_operand;
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int32_t imm8;
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long long original_imm8, jump_target;
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int16_t compressed_imm8;
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__typeof__(rel->r_addend) target_alignment = 1;
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const intptr_t sym_base_addr = (intptr_t)sym_base_addr_unsigned;
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LOG_DBG("Relocating symbol %s at %p with base address %p load address %p type %" PRIu64,
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sym_name, (void *)loc, (void *)sym_base_addr, (void *)load_bias,
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(uint64_t)reloc_type);
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/* FIXME not all types of relocations currently supported, especially TLS */
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switch (reloc_type) {
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case R_RISCV_NONE:
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break;
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case R_RISCV_32:
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jump_target = sym_base_addr + rel->r_addend; /* S + A */
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UNALIGNED_PUT((uint32_t)jump_target, loc32);
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return riscv_relocation_fits(jump_target, INT32_MAX, reloc_type);
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case R_RISCV_64:
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/* full 64-bit range, need no range check */
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UNALIGNED_PUT(sym_base_addr + rel->r_addend, loc64); /* S + A */
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break;
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case R_RISCV_RELATIVE:
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/* either full 32-bit or 64-bit range, need no range check */
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UNALIGNED_PUT(load_bias + rel->r_addend, loc_word); /* B + A */
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break;
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case R_RISCV_JUMP_SLOT:
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/* either full 32-bit or 64-bit range, need no range check */
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UNALIGNED_PUT(sym_base_addr, loc_word); /* S */
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break;
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case R_RISCV_BRANCH:
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jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
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modified_operand = UNALIGNED_GET(loc32);
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imm8 = jump_target;
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modified_operand = R_RISCV_CLEAR_BTYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_BTYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_B_TYPE,
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reloc_type);
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case R_RISCV_JAL:
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jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
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modified_operand = UNALIGNED_GET(loc32);
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imm8 = jump_target;
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modified_operand = R_RISCV_CLEAR_JTYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_JTYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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case R_RISCV_CALL:
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case R_RISCV_CALL_PLT:
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case R_RISCV_PCREL_HI20:
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modified_operand = UNALIGNED_GET(loc32);
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jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
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imm8 = jump_target;
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/* bit 12 of the immediate goes to I-type instruction and might
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* change the sign of the number
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*/
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/* in order to avoid that, we add 1 to the upper immediate if bit 12 is one */
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/* see RISC-V la pseudo instruction */
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imm8 += imm8 & 0x800;
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original_imm8 = imm8;
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modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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if (reloc_type != R_RISCV_PCREL_HI20) {
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/* PCREL_HI20 is only U-type, not truly U+I-type */
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/* for the others, need to also modify following I-type */
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loc32++;
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imm8 = jump_target;
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modified_operand = UNALIGNED_GET(loc32);
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modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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}
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last_u_type_jump_target = jump_target;
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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case R_RISCV_PCREL_LO12_I:
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/* need the same jump target as preceding U-type relocation */
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if (last_u_type_jump_target == 0) {
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LOG_ERR("R_RISCV_PCREL_LO12_I relocation without preceding U-type "
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"relocation!");
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return -ENOEXEC;
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}
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modified_operand = UNALIGNED_GET(loc32);
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jump_target = last_u_type_jump_target; /* S - P */
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last_u_type_jump_target = 0;
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imm8 = jump_target;
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modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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break;
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case R_RISCV_PCREL_LO12_S:
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/* need the same jump target as preceding U-type relocation */
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if (last_u_type_jump_target == 0) {
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LOG_ERR("R_RISCV_PCREL_LO12_I relocation without preceding U-type "
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"relocation!");
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return -ENOEXEC;
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}
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modified_operand = UNALIGNED_GET(loc32);
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jump_target = last_u_type_jump_target; /* S - P */
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last_u_type_jump_target = 0;
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imm8 = jump_target;
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modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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case R_RISCV_HI20:
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jump_target = sym_base_addr + rel->r_addend; /* S + A */
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modified_operand = UNALIGNED_GET(loc32);
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imm8 = jump_target;
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/* bit 12 of the immediate goes to I-type instruction and might
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* change the sign of the number
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*/
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/* in order to avoid that, we add 1 to the upper immediate if bit 12 is one*/
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/* see RISC-V la pseudo instruction */
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original_imm8 = imm8;
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imm8 += imm8 & 0x800;
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modified_operand = R_RISCV_CLEAR_UTYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_UTYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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case R_RISCV_LO12_I:
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modified_operand = UNALIGNED_GET(loc32);
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jump_target = sym_base_addr + rel->r_addend; /* S + A */
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imm8 = jump_target;
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/* this is always used with R_RISCV_HI20 */
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modified_operand = R_RISCV_CLEAR_ITYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_ITYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
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reloc_type);
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case R_RISCV_LO12_S:
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modified_operand = UNALIGNED_GET(loc32);
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imm8 = sym_base_addr + rel->r_addend; /* S + A */
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/*
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* S-type is used for stores/loads etc.
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* size check is done at compile time, as it depends on the size of
241+
* the structure we are trying to load/store
242+
*/
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modified_operand = R_RISCV_CLEAR_STYPE_IMM8(modified_operand);
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modified_operand = R_RISCV_SET_STYPE_IMM8(modified_operand, imm8);
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UNALIGNED_PUT(modified_operand, loc32);
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break;
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/* for add/sub/set, compiler needs to ensure that the ELF sections are close enough */
248+
case R_RISCV_ADD8:
249+
tmp8 = UNALIGNED_GET(loc8);
250+
tmp8 += sym_base_addr + rel->r_addend; /* V + S + A */
251+
UNALIGNED_PUT(tmp8, loc8);
252+
break;
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case R_RISCV_ADD16:
254+
tmp16 = UNALIGNED_GET(loc16);
255+
tmp16 += sym_base_addr + rel->r_addend; /* V + S + A */
256+
UNALIGNED_PUT(tmp16, loc16);
257+
break;
258+
case R_RISCV_ADD32:
259+
tmp32 = UNALIGNED_GET(loc32);
260+
tmp32 += sym_base_addr + rel->r_addend; /* V + S + A */
261+
UNALIGNED_PUT(tmp32, loc32);
262+
break;
263+
case R_RISCV_ADD64:
264+
tmp64 = UNALIGNED_GET(loc64);
265+
tmp64 += sym_base_addr + rel->r_addend; /* V + S + A */
266+
UNALIGNED_PUT(tmp64, loc64);
267+
break;
268+
case R_RISCV_SUB8:
269+
tmp8 = UNALIGNED_GET(loc8);
270+
tmp8 -= sym_base_addr + rel->r_addend; /* V - S - A */
271+
UNALIGNED_PUT(tmp8, loc8);
272+
break;
273+
case R_RISCV_SUB16:
274+
tmp16 = UNALIGNED_GET(loc16);
275+
tmp16 -= sym_base_addr + rel->r_addend; /* V - S - A */
276+
UNALIGNED_PUT(tmp16, loc16);
277+
break;
278+
case R_RISCV_SUB32:
279+
tmp32 = UNALIGNED_GET(loc32);
280+
tmp32 -= sym_base_addr + rel->r_addend; /* V - S - A */
281+
UNALIGNED_PUT(tmp32, loc32);
282+
break;
283+
case R_RISCV_SUB64:
284+
tmp64 = UNALIGNED_GET(loc64);
285+
tmp64 -= sym_base_addr + rel->r_addend; /* V - S - A */
286+
UNALIGNED_PUT(tmp64, loc64);
287+
break;
288+
case R_RISCV_SUB6:
289+
tmp8 = UNALIGNED_GET(loc8) & (0x1F);
290+
UNALIGNED_PUT(tmp8, loc8);
291+
tmp8 = tmp8 - sym_base_addr - rel->r_addend; /* V - S - A */
292+
tmp8 = tmp8 & (0x1F);
293+
tmp8 = tmp8 | UNALIGNED_GET(loc8);
294+
UNALIGNED_PUT(tmp8, loc8);
295+
break;
296+
case R_RISCV_SET6:
297+
tmp8 = UNALIGNED_GET(loc8) & (0x1F);
298+
UNALIGNED_PUT(tmp8, loc8);
299+
tmp8 = sym_base_addr + rel->r_addend; /* S + A */
300+
tmp8 = tmp8 | UNALIGNED_GET(loc8);
301+
UNALIGNED_PUT(tmp8, loc8);
302+
break;
303+
case R_RISCV_SET8:
304+
tmp8 = sym_base_addr + rel->r_addend; /* S + A */
305+
UNALIGNED_PUT(tmp8, loc8);
306+
break;
307+
case R_RISCV_SET16:
308+
tmp16 = sym_base_addr + rel->r_addend; /* S + A */
309+
UNALIGNED_PUT(tmp16, loc16);
310+
break;
311+
case R_RISCV_SET32:
312+
tmp32 = sym_base_addr + rel->r_addend; /* S + A */
313+
UNALIGNED_PUT(tmp32, loc32);
314+
break;
315+
case R_RISCV_32_PCREL:
316+
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
317+
tmp32 = jump_target;
318+
UNALIGNED_PUT(tmp32, loc32);
319+
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
320+
reloc_type);
321+
case R_RISCV_PLT32:
322+
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
323+
tmp32 = jump_target;
324+
UNALIGNED_PUT(tmp32, loc32);
325+
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_U_PLUS_I_TYPE,
326+
reloc_type);
327+
case R_RISCV_RVC_BRANCH:
328+
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
329+
modified_compressed_operand = UNALIGNED_GET(loc16);
330+
compressed_imm8 = jump_target;
331+
modified_compressed_operand =
332+
R_RISCV_CLEAR_CBTYPE_IMM8(modified_compressed_operand);
333+
modified_compressed_operand =
334+
R_RISCV_SET_CBTYPE_IMM8(modified_compressed_operand, compressed_imm8);
335+
UNALIGNED_PUT(modified_compressed_operand, loc16);
336+
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CB_TYPE,
337+
reloc_type);
338+
case R_RISCV_RVC_JUMP:
339+
jump_target = sym_base_addr + rel->r_addend - loc; /* S + A - P */
340+
modified_compressed_operand = UNALIGNED_GET(loc16);
341+
compressed_imm8 = jump_target;
342+
modified_compressed_operand =
343+
R_RISCV_CLEAR_CJTYPE_IMM8(modified_compressed_operand);
344+
modified_compressed_operand =
345+
R_RISCV_SET_CJTYPE_IMM8(modified_compressed_operand, compressed_imm8);
346+
UNALIGNED_PUT(modified_compressed_operand, loc16);
347+
return riscv_relocation_fits(jump_target, RISCV_MAX_JUMP_DISTANCE_CJ_TYPE,
348+
reloc_type);
349+
case R_RISCV_ALIGN:
350+
/* we are supposed to move the symbol such that it is aligned to the next power of
351+
* two >= addend
352+
*/
353+
/* this involves moving the symbol */
354+
while (target_alignment < rel->r_addend) {
355+
target_alignment *= 2;
356+
}
357+
LOG_ERR("Symbol %s with location %p requires alignment to %" PRIu64 " bytes!",
358+
sym_name, (void *)loc, (uint64_t)target_alignment);
359+
LOG_ERR("Alignment relocation is currently not supported!");
360+
return -ENOEXEC;
361+
/* ignored, this is primarily intended for removing instructions during link-time
362+
* optimization
363+
*/
364+
case R_RISCV_RELAX:
365+
break;
366+
default:
367+
LOG_ERR("Unsupported relocation type: %" PRIu64 " for symbol: %s",
368+
(uint64_t)reloc_type, sym_name);
369+
return -ENOEXEC;
370+
}
371+
372+
return 0;
373+
}

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