dts: bindings: display: add bindings for STM32 LTDC peripheral

Add properties for specifying display on/off GPIO, backlight
control GPIO, external SDRAM and LCD RGB timing parameters

Signed-off-by: Tomislav Milkovic <[email protected]>

Author: tmilkovic51

dts/bindings/display/st,stm32-ltdc.yaml

@@ -0,0 +1,116 @@
+# Copyright (c) 2022, Byte-Lab d.o.o. <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+description: STM32 LCD-TFT display controller
+
+compatible: "st,stm32-ltdc"
+
+include: [display-controller.yaml,  pinctrl-device.yaml]
+
+properties:
+    disp-on-gpios:
+      type: phandle-array
+      required: false
+      description: |
+        Display on/off GPIO pin.
+        Configure the GPIO polarity (active high/active low) according to LCD datasheet.
+
+    bl-ctrl-gpios:
+      type: phandle-array
+      required: false
+      description: |
+        Backlight on/off GPIO pin.
+        Configure the GPIO polarity (active high/active low) according to LCD datasheet.
+
+    ext-sdram:
+      type: phandle
+      required: false
+      description: |
+        External SDRAM in which frame buffer will be stored.
+        If not defined, internal RAM will be used.
+
+    clocks:
+      required: true
+
+    interrupts:
+      required: true
+
+    pinctrl-0:
+      required: true
+
+    hsync-pol:
+      type: int
+      required: true
+      description: |
+        Horizontal synchronization pulse polarity.
+        If HSYNC is active low, use STM32_LTDC_HSPOL_ACTIVE_LOW,
+        otherwise use STM32_LTDC_HSPOL_ACTIVE_HIGH.
+
+    vsync-pol:
+      type: int
+      required: true
+      description: |
+        Vertical synchronization pulse polarity.
+        If VSYNC is active low, use STM32_LTDC_VSPOL_ACTIVE_LOW,
+        otherwise use STM32_LTDC_VSPOL_ACTIVE_HIGH.
+
+    de-pol:
+      type: int
+      required: true
+      description: |
+        Data enable pulse polarity.
+        If DE is active low, use STM32_LTDC_DEPOL_ACTIVE_LOW,
+        otherwise use STM32_LTDC_DEPOL_ACTIVE_HIGH.
+
+    pclk-pol:
+      type: int
+      required: true
+      description: |
+        Pixel clock polarity.
+        If RGB data is sampled on falling edge of PCLK, use STM32_LTDC_PCPOL_ACTIVE_LOW,
+        otherwise use STM32_LTDC_PCPOL_ACTIVE_HIGH.
+
+    hsync-duration:
+      type: int
+      required: true
+      description: Horizontal synchronization pulse duration, in pixels
+
+    vsync-duration:
+      type: int
+      required: true
+      description: Vertical synchronization pulse duration, in lines
+
+    hbp-duration:
+      type: int
+      required: true
+      description: Horizontal back-porch duration, in pixels
+
+    vbp-duration:
+      type: int
+      required: true
+      description: Vertical back-porch duration, in lines
+
+    hfp-duration:
+      type: int
+      required: true
+      description: Horizontal front porch duration, in pixels
+
+    vfp-duration:
+      type: int
+      required: true
+      description: Vertical front porch duration, in lines
+
+    def-back-color-red:
+      type: int
+      required: false
+      description: Default display background color - red
+
+    def-back-color-green:
+      type: int
+      required: false
+      description: Default display background color - green
+
+    def-back-color-blue:
+      type: int
+      required: false
+      description: Default display background color - blue