dts: arm: stm32u5 octospi clock source

The definition of the clock source for the 2 octospi
instances is given by the DTS node.
The default value selects the sysclk (not pclk)
for the alternate clock control.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

dts/arm/st/u5/stm32u5.dtsi

@@ -360,7 +360,8 @@
 			compatible = "st,stm32-ospi";
 			reg = <0x420d1400 0x400>;
 			interrupts = <76 0>;
-			clocks = <&rcc STM32_CLOCK_BUS_AHB2_2 0x00000010>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2_2 0x00000010>,
+				<&rcc STM32_SRC_SYSCLK OCTOSPI_SEL(0)>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";
@@ -371,7 +372,8 @@
 			compatible = "st,stm32-ospi";
 			reg = <0x420d2400 0x400>;
 			interrupts = <120 0>;
-			clocks = <&rcc STM32_CLOCK_BUS_AHB2_2 0x00000100>;
+			clocks = <&rcc STM32_CLOCK_BUS_AHB2_2 0x00000100>,
+				<&rcc STM32_SRC_SYSCLK OCTOSPI_SEL(0)>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			status = "disabled";