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samples/tests: adc: silabs: add multiple device overlays.
This commit introduces/updates overlays for multiple silabs boards for ADC samples and ADC tests. Signed-off-by: Martin Hoff <[email protected]>
1 parent f5d8d50 commit 52bfc23

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14 files changed

+200
-20
lines changed

14 files changed

+200
-20
lines changed

‎samples/drivers/adc/adc_dt/sample.yaml‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,8 @@ tests:
3838
- mcx_n9xx_evk/mcxn947/cpu0
3939
- frdm_mcxc242
4040
- ucans32k1sic
41-
- xg24_rb4187c
41+
- slwrb4180a
42+
- xg27_rb4194a
4243
- xg29_rb4412a
4344
- raytac_an54l15q_db/nrf54l15/cpuapp
4445
- frdm_mcxa346

‎samples/drivers/adc/adc_sequence/sample.yaml‎

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Original file line numberDiff line numberDiff line change
@@ -27,6 +27,9 @@ tests:
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- s32k148_evb
2828
- frdm_mcxc242
2929
- stm32f3_disco
30+
- slwrb4180a
31+
- xg27_rb4194a
32+
- xg29_rb4412a
3033
integration_platforms:
3134
- nrf52840dk/nrf52840
3235
sample.drivers.adc.adc_sequence.8bit:

‎tests/drivers/adc/adc_accuracy_test/boards/sltb010a.overlay‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/*
2+
* SPDX-License-Identifier: Apache-2.0
3+
*
4+
* Copyright (c) 2025 Silicon Laboratories Inc.
5+
*/
6+
7+
#include <dt-bindings/adc/silabs-adc.h>
8+
9+
/ {
10+
zephyr,user {
11+
io-channels = <&adc0 3>;
12+
reference-mv = <(3000 / 4)>;
13+
expected-accuracy = <32>;
14+
};
15+
};
16+
17+
&adc0 {
18+
#address-cells = <1>;
19+
#size-cells = <0>;
20+
status = "okay";
21+
22+
channel@3 {
23+
reg = <3>;
24+
zephyr,gain = "ADC_GAIN_1";
25+
zephyr,reference = "ADC_REF_INTERNAL";
26+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
27+
zephyr,resolution = <12>;
28+
zephyr,input-positive = <IADC_INPUT_AVDD>;
29+
};
30+
};

‎tests/drivers/adc/adc_accuracy_test/boards/slwrb4180a.overlay‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
/*
2+
* SPDX-License-Identifier: Apache-2.0
3+
*
4+
* Copyright (c) 2025 Silicon Laboratories Inc.
5+
*/
6+
7+
#include <dt-bindings/adc/silabs-adc.h>
8+
9+
/ {
10+
zephyr,user {
11+
io-channels = <&adc0 3>;
12+
reference-mv = <(3300 / 4)>;
13+
expected-accuracy = <32>;
14+
};
15+
};
16+
17+
&adc0 {
18+
19+
#address-cells = <1>;
20+
#size-cells = <0>;
21+
status = "okay";
22+
23+
channel@3 {
24+
reg = <3>;
25+
zephyr,gain = "ADC_GAIN_1";
26+
zephyr,reference = "ADC_REF_INTERNAL";
27+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
28+
zephyr,resolution = <12>;
29+
zephyr,input-positive = <IADC_INPUT_AVDD>;
30+
};
31+
};

‎tests/drivers/adc/adc_accuracy_test/boards/xg23_rb4210a.overlay‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/*
2+
* SPDX-License-Identifier: Apache-2.0
3+
*
4+
* Copyright (c) 2025 Silicon Laboratories Inc.
5+
*/
6+
7+
#include <dt-bindings/adc/silabs-adc.h>
8+
9+
/ {
10+
zephyr,user {
11+
io-channels = <&adc0 4>;
12+
reference-mv = <(3300 / 4)>;
13+
expected-accuracy = <32>;
14+
};
15+
};
16+
17+
&adc0 {
18+
#address-cells = <1>;
19+
#size-cells = <0>;
20+
status = "okay";
21+
22+
channel@4 {
23+
reg = <4>;
24+
zephyr,gain = "ADC_GAIN_1";
25+
zephyr,reference = "ADC_REF_INTERNAL";
26+
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
27+
zephyr,resolution = <12>;
28+
zephyr,input-positive = <IADC_INPUT_AVDD>;
29+
};
30+
};

‎tests/drivers/adc/adc_accuracy_test/testcase.yaml‎

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Original file line numberDiff line numberDiff line change
@@ -39,11 +39,14 @@ tests:
3939
- ek_ra4m2
4040
- ek_ra4m3
4141
- ek_ra4w1
42+
- sltb010a
43+
- xg23_rb4210a
4244
- xg24_dk2601b
4345
- xg24_rb4187c
4446
- xg27_dk2602a
4547
- xg29_rb4412a
4648
- bg29_rb4420a
49+
- slwrb4180a
4750
integration_platforms:
4851
- frdm_kl25z
4952
- nrf54l15dk/nrf54l15/cpuapp

‎tests/drivers/adc/adc_api/boards/sltb010a.overlay‎

Lines changed: 25 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2,33 +2,50 @@
22
* SPDX-License-Identifier: Apache-2.0
33
*
44
* Copyright (c) 2023 Antmicro <www.antmicro.com>
5+
* Copyright (c) 2025 Silicon Laboratories Inc.
6+
*
57
*/
68

9+
#include <dt-bindings/adc/silabs-adc.h>
10+
711
/ {
812
zephyr,user {
9-
io-channels = <&adc0 0>, <&adc0 1>;
13+
io-channels = <&adc0 3>, <&adc0 4>;
14+
};
15+
};
16+
17+
&pinctrl {
18+
adc0_default: adc0_default {
19+
group0 {
20+
/* Allocate odd bus 0 on GPIO port B to IADC for access to pin PB1 */
21+
silabs,analog-bus = <ABUS_BODD0_IADC0>;
22+
};
1023
};
1124
};
1225

1326
&adc0 {
27+
pinctrl-0 = <&adc0_default>;
28+
pinctrl-names = "default";
1429
#address-cells = <1>;
1530
#size-cells = <0>;
31+
status = "okay";
1632

17-
channel@0 {
18-
reg = <0>;
33+
channel@3 {
34+
reg = <3>;
1935
zephyr,gain = "ADC_GAIN_1";
2036
zephyr,reference = "ADC_REF_INTERNAL";
2137
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
2238
zephyr,resolution = <12>;
23-
zephyr,input-positive = <0x11>;
39+
zephyr,input-positive = <IADC_INPUT_AVDD>;
2440
};
2541

26-
channel@1 {
27-
reg = <1>;
42+
channel@4 {
43+
reg = <4>;
2844
zephyr,gain = "ADC_GAIN_1";
29-
zephyr,reference = "ADC_REF_INTERNAL";
45+
zephyr,reference = "ADC_REF_VDD_1";
46+
zephyr,vref-mv = <3000>;
3047
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
3148
zephyr,resolution = <12>;
32-
zephyr,input-positive = <0x01>;
49+
zephyr,input-positive = <IADC_INPUT_PB3>;
3350
};
3451
};

‎samples/drivers/adc/adc_dt/boards/xg29_rb4412a.overlay‎ renamed to ‎tests/drivers/adc/adc_api/boards/slwrb4180a.overlay‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
* Copyright (c) 2025 Silicon Laboratories Inc.
55
*/
66

7-
#include <dt-bindings/pinctrl/silabs/xg29-pinctrl.h>
87
#include <dt-bindings/adc/silabs-adc.h>
98

109
/ {

‎samples/drivers/adc/adc_dt/boards/xg24_rb4187c.overlay‎ renamed to ‎tests/drivers/adc/adc_api/boards/xg23_rb4210a.overlay‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
* Copyright (c) 2025 Silicon Laboratories Inc.
55
*/
66

7-
#include <dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
87
#include <dt-bindings/adc/silabs-adc.h>
98

109
/ {
@@ -45,6 +44,6 @@
4544
zephyr,vref-mv = <3300>;
4645
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
4746
zephyr,resolution = <12>;
48-
zephyr,input-positive = <IADC_INPUT_PB1>;
47+
zephyr,input-positive = <IADC_INPUT_PB3>;
4948
};
5049
};

‎tests/drivers/adc/adc_api/boards/xg27_dk2602a.overlay‎

Lines changed: 21 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,29 +8,42 @@
88

99
/ {
1010
zephyr,user {
11-
io-channels = <&adc0 0>, <&adc0 1>;
11+
io-channels = <&adc0 3>, <&adc0 4>;
12+
};
13+
};
14+
15+
&pinctrl {
16+
adc0_default: adc0_default {
17+
group0 {
18+
/* Allocate odd bus 0 on GPIO port B to IADC for access to pin PB1 */
19+
silabs,analog-bus = <ABUS_BODD0_IADC0>;
20+
};
1221
};
1322
};
1423

1524
&adc0 {
25+
pinctrl-0 = <&adc0_default>;
26+
pinctrl-names = "default";
1627
#address-cells = <1>;
1728
#size-cells = <0>;
29+
status = "okay";
1830

19-
channel@0 {
20-
reg = <0>;
31+
channel@3 {
32+
reg = <3>;
2133
zephyr,gain = "ADC_GAIN_1";
2234
zephyr,reference = "ADC_REF_INTERNAL";
2335
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
2436
zephyr,resolution = <12>;
25-
zephyr,input-positive = <IADC_INPUT_IOVDD>;
37+
zephyr,input-positive = <IADC_INPUT_AVDD>;
2638
};
2739

28-
channel@1 {
29-
reg = <1>;
40+
channel@4 {
41+
reg = <4>;
3042
zephyr,gain = "ADC_GAIN_1";
31-
zephyr,reference = "ADC_REF_INTERNAL";
43+
zephyr,reference = "ADC_REF_VDD_1";
44+
zephyr,vref-mv = <3300>;
3245
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
3346
zephyr,resolution = <12>;
34-
zephyr,input-positive = <IADC_INPUT_GND>;
47+
zephyr,input-positive = <IADC_INPUT_PB3>;
3548
};
3649
};

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