boards: rd_rw612_bga: Add power init code for PM3 support

1. Add the power init code.
2. Add code to support Low Power Mode support from the RTC
   1HZ clock.

Signed-off-by: Mahesh Mahadevan <[email protected]>

Author: mmahadevan108

boards/nxp/rd_rw612_bga/CMakeLists.txt

@@ -1,9 +1,12 @@
 #
-# Copyright 2022-2023 NXP
+# Copyright 2022-2025 NXP
 #
 # SPDX-License-Identifier: Apache-2.0
 #
 
+zephyr_library()
+zephyr_library_sources(init.c)
+
 if(CONFIG_NXP_RW6XX_BOOT_HEADER)
   if(NOT DEFINED CONFIG_BOARD_RD_RW612_BGA)
     message(WARNING "It appears you are using the board definition for "
@@ -12,6 +15,11 @@ if(CONFIG_NXP_RW6XX_BOOT_HEADER)
   endif()
   zephyr_compile_definitions(BOOT_HEADER_ENABLE=1)
   zephyr_compile_definitions(BOARD_FLASH_SIZE=CONFIG_FLASH_SIZE*1024)
-  zephyr_library()
   zephyr_library_sources(MX25U51245GZ4I00_FCB.c)
 endif()
+
+if (CONFIG_DT_HAS_NXP_ENET_MAC_ENABLED AND CONFIG_XTAL32K)
+	message(FATAL_ERROR "Ethernet and external 32K clock source are "
+		"mutually exclusive on RD_RW612_BGA due to shared PCB nets "
+		"between the ethernet PHY and the external oscillator")
+endif()

boards/nxp/rd_rw612_bga/Kconfig

@@ -0,0 +1,5 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_RD_RW612_BGA
+	select BOARD_EARLY_INIT_HOOK

boards/nxp/rd_rw612_bga/Kconfig.defconfig

@@ -1,6 +1,6 @@
 # RD_RW612_BGA board
 
-# Copyright 2022-2024 NXP
+# Copyright 2022-2025 NXP
 # SPDX-License-Identifier: Apache-2.0
 
 if BOARD_RD_RW612_BGA
@@ -37,4 +37,11 @@ config NET_L2_ETHERNET
 
 endif # DT_HAS_NXP_ENET_MAC_ENABLED && NETWORKING
 
+if COUNTER_MCUX_LPC_RTC_1HZ
+
+config XTAL32K
+	default y
+
+endif # COUNTER_MCUX_LPC_RTC_1HZ
+
 endif # BOARD_RD_RW612_BGA

boards/nxp/rd_rw612_bga/doc/index.rst

@@ -25,6 +25,10 @@ Supported Features
 
 .. zephyr:board-supported-hw::
 
+.. note::
+
+   Power modes 1, 2 and 3 are supported when using System Power Management.
+
 Display Support
 ***************
 

boards/nxp/rd_rw612_bga/init.c

@@ -0,0 +1,45 @@
+/*
+ * Copyright 2022, 2024-25 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/pm/pm.h>
+#include <fsl_power.h>
+
+static void rdrw61x_power_init_config(void)
+{
+	power_init_config_t initCfg = {
+		/* VCORE AVDD18 supplied from iBuck on RD board. */
+		.iBuck = true,
+		/* CAU_SOC_SLP_REF_CLK is needed for LPOSC. */
+		.gateCauRefClk = false,
+	};
+
+	POWER_InitPowerConfig(&initCfg);
+}
+
+#if CONFIG_PM
+static void rdrw61x_pm_state_exit(enum pm_state state)
+{
+	switch (state) {
+	case PM_STATE_STANDBY:
+		rdrw61x_power_init_config();
+		break;
+	default:
+		break;
+	}
+}
+#endif
+
+void board_early_init_hook(void)
+{
+	rdrw61x_power_init_config();
+
+#if CONFIG_PM
+	static struct pm_notifier rdrw61x_pm_notifier = {
+		.state_exit = rdrw61x_pm_state_exit,
+	};
+
+	pm_notifier_register(&rdrw61x_pm_notifier);
+#endif
+}