@@ -284,15 +284,15 @@ static inline void uhc_dwc2_config_fifo_fixed_dma(const struct device *dev)
284284 * DWC2 low-level Functions,
285285 */
286286
287- void dwc2_hal_flush_rx_fifo (struct usb_dwc2_reg * const dwc2 )
287+ static void dwc2_hal_flush_rx_fifo (struct usb_dwc2_reg * const dwc2 )
288288{
289289 sys_write32 (USB_DWC2_GRSTCTL_RXFFLSH , (mem_addr_t )& dwc2 -> grstctl );
290290 while (sys_read32 ((mem_addr_t )& dwc2 -> grstctl ) & USB_DWC2_GRSTCTL_RXFFLSH ) {
291291 continue ;
292292 }
293293}
294294
295- void dwc2_hal_flush_tx_fifo (struct usb_dwc2_reg * const dwc2 , const uint8_t fnum )
295+ static void dwc2_hal_flush_tx_fifo (struct usb_dwc2_reg * const dwc2 , const uint8_t fnum )
296296{
297297 uint32_t grstctl ;
298298
@@ -341,7 +341,7 @@ static inline void dwc2_hal_toggle_power(struct usb_dwc2_reg *const dwc2, bool p
341341{
342342 uint32_t hprt ;
343343
344- hprt = sys_read32 ((mem_addr_t )& dwc2 -> hprt );;
344+ hprt = sys_read32 ((mem_addr_t )& dwc2 -> hprt );
345345 if (power_on ) {
346346 hprt |= USB_DWC2_HPRT_PRTPWR ;
347347 } else {
@@ -401,13 +401,13 @@ static void dwc2_channel_configure(const struct device *dev, struct uhc_dwc2_cha
401401 const struct uhc_dwc2_config * const config = dev -> config ;
402402 struct usb_dwc2_reg * const dwc2 = config -> base ;
403403 const struct usb_dwc2_host_chan * chan_regs = UHC_DWC2_CHAN_REG (dwc2 , chan -> chan_idx );
404+ uint32_t hcchar ;
404405
405- uint32_t hcchar =
406- ((uint32_t )chan -> ep_mps << USB_DWC2_HCCHAR0_MPS_POS ) |
407- ((uint32_t )USB_EP_GET_IDX (chan -> ep_addr ) << USB_DWC2_HCCHAR0_EPNUM_POS ) |
408- ((uint32_t )chan -> type << USB_DWC2_HCCHAR0_EPTYPE_POS ) |
409- ((uint32_t )1UL /* TODO: chan->mult */ << USB_DWC2_HCCHAR0_EC_POS ) |
410- ((uint32_t )chan -> dev_addr << USB_DWC2_HCCHAR0_DEVADDR_POS );
406+ hcchar = ((uint32_t )chan -> ep_mps << USB_DWC2_HCCHAR0_MPS_POS );
407+ hcchar |= ((uint32_t )USB_EP_GET_IDX (chan -> ep_addr ) << USB_DWC2_HCCHAR0_EPNUM_POS );
408+ hcchar |= ((uint32_t )chan -> type << USB_DWC2_HCCHAR0_EPTYPE_POS );
409+ hcchar |= ((uint32_t )1UL /* TODO: chan->mult */ << USB_DWC2_HCCHAR0_EC_POS );
410+ hcchar |= ((uint32_t )chan -> dev_addr << USB_DWC2_HCCHAR0_DEVADDR_POS );
411411
412412 if (USB_EP_DIR_IS_IN (chan -> ep_addr )) {
413413 hcchar |= USB_DWC2_HCCHAR0_EPDIR ;
@@ -785,8 +785,8 @@ static inline enum uhc_dwc2_core_event uhc_dwc2_decode_intr(const struct device
785785 return core_event ;
786786}
787787
788- enum uhc_dwc2_chan_event uhc_dwc2_hal_chan_decode_intr (const struct device * dev ,
789- struct uhc_dwc2_chan * chan )
788+ static enum uhc_dwc2_chan_event uhc_dwc2_hal_chan_decode_intr (const struct device * dev ,
789+ struct uhc_dwc2_chan * chan )
790790{
791791 const struct uhc_dwc2_config * const config = dev -> config ;
792792 struct usb_dwc2_reg * const dwc2 = config -> base ;
@@ -839,7 +839,7 @@ enum uhc_dwc2_chan_event uhc_dwc2_hal_chan_decode_intr(const struct device *dev,
839839 return chan_event ;
840840}
841841
842- struct uhc_dwc2_chan * uhc_dwc2_get_chan_pending_intr (const struct device * dev )
842+ static struct uhc_dwc2_chan * uhc_dwc2_get_chan_pending_intr (const struct device * dev )
843843{
844844 struct uhc_dwc2_data * priv = uhc_get_private (dev );
845845 int chan_num ;
@@ -1386,8 +1386,8 @@ static inline int uhc_dwc2_chan_config(const struct device *dev, uint8_t chan_id
13861386 /* TODO: Double buffering scheme? */
13871387
13881388 /* Set the default chan's MPS to the worst case MPS for the device's speed */
1389- chan -> ep_mps = ( dev_speed == UHC_DWC2_SPEED_LOW ) ? CTRL_EP_MAX_MPS_LS
1390- : CTRL_EP_MAX_MPS_HSFS ;
1389+ chan -> ep_mps =
1390+ ( dev_speed == UHC_DWC2_SPEED_LOW ) ? CTRL_EP_MAX_MPS_LS : CTRL_EP_MAX_MPS_HSFS ;
13911391 chan -> type = type ;
13921392 chan -> ep_addr = ep_addr ;
13931393 chan -> chan_idx = chan_idx ;
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