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Commit 5474273

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author
Declan Snyder
committed
WIP: rt5xx inputmux conversion, first mux consumers
1 parent a07b747 commit 5474273

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8 files changed

+61
-86
lines changed

8 files changed

+61
-86
lines changed

‎boards/nxp/mimxrt595_evk/board.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -313,6 +313,7 @@ void board_early_init_hook(void)
313313
/* Enable the DMA requests with only 1 mux option. The other request
314314
* choices should be configured for the application
315315
*/
316+
/*
316317
INPUTMUX_EnableSignal(INPUTMUX,
317318
kINPUTMUX_Flexcomm11RxToDmac0Ch32RequestEna, true);
318319
INPUTMUX_EnableSignal(INPUTMUX,
@@ -321,6 +322,7 @@ void board_early_init_hook(void)
321322
kINPUTMUX_Flexcomm12RxToDmac0Ch34RequestEna, true);
322323
INPUTMUX_EnableSignal(INPUTMUX,
323324
kINPUTMUX_Flexcomm12TxToDmac0Ch35RequestEna, true);
325+
*/
324326
INPUTMUX_EnableSignal(INPUTMUX,
325327
kINPUTMUX_Flexcomm16RxToDmac0Ch28RequestEna, true);
326328
INPUTMUX_EnableSignal(INPUTMUX,

‎drivers/clock_control/clock_control_mcux_syscon.c‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,12 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
4444
}
4545
#endif
4646

47+
#if defined(CONFIG_MUX_NXP_INPUTMUX)
48+
if ((uint32_t)sub_system == MCUX_INPUTMUX_CLK) {
49+
CLOCK_EnableClock(kCLOCK_InputMux);
50+
}
51+
#endif
52+
4753
#if defined(CONFIG_PINCTRL_NXP_PORT)
4854
switch ((uint32_t)sub_system) {
4955
#if defined(CONFIG_SOC_FAMILY_MCXA)
@@ -142,6 +148,11 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
142148
static int mcux_lpc_syscon_clock_control_off(const struct device *dev,
143149
clock_control_subsys_t sub_system)
144150
{
151+
#if defined(CONFIG_MUX_NXP_INPUTMUX)
152+
if ((uint32_t)sub_system == MCUX_INPUTMUX_CLK) {
153+
CLOCK_DisableClock(kCLOCK_InputMux);
154+
}
155+
#endif
145156
return 0;
146157
}
147158

‎drivers/serial/Kconfig.mcux‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ config UART_MCUX
77
bool "MCUX uart driver"
88
default y
99
depends on DT_HAS_NXP_KINETIS_UART_ENABLED
10-
depends on CLOCK_CONTROL
10+
select CLOCK_CONTROL
1111
select SERIAL_HAS_DRIVER
1212
select SERIAL_SUPPORT_INTERRUPT
1313
select PINCTRL

‎drivers/serial/Kconfig.mcux_flexcomm‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ config UART_MCUX_FLEXCOMM
1212
DT_HAS_NXP_LPC_DMA_ENABLED
1313
select PM_POLICY_DEVICE_CONSTRAINTS if PM
1414
select DMA if UART_ASYNC_API
15+
select MUX_CONTROL if UART_ASYNC_API
1516
select PINCTRL
1617
help
1718
Enable the MCUX USART driver.

‎drivers/serial/uart_mcux_flexcomm.c‎

Lines changed: 30 additions & 84 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@
2424
#include <zephyr/drivers/pinctrl.h>
2525
#ifdef CONFIG_UART_ASYNC_API
2626
#include <zephyr/drivers/dma.h>
27-
#include <fsl_inputmux.h>
27+
#include <zephyr/drivers/mux.h>
2828
#endif
2929

3030
#define FC_UART_IS_WAKEUP (IS_ENABLED(CONFIG_PM) && DT_ANY_INST_HAS_BOOL_STATUS_OKAY(wakeup_source))
@@ -53,6 +53,9 @@ struct mcux_flexcomm_config {
5353
struct mcux_flexcomm_uart_dma_config rx_dma;
5454
void (*rx_timeout_func)(struct k_work *work);
5555
void (*tx_timeout_func)(struct k_work *work);
56+
const struct device *mux_dev;
57+
struct mux_control **mux_controls;
58+
size_t num_muxes;
5659
#endif
5760
#ifdef CONFIG_PM_POLICY_DEVICE_CONSTRAINTS
5861
void (*pm_unlock_work_fn)(struct k_work *);
@@ -903,75 +906,6 @@ static void mcux_flexcomm_uart_dma_rx_callback(const struct device *dma_device,
903906
data->rx_data.offset = 0;
904907
}
905908

906-
#if defined(CONFIG_SOC_SERIES_IMXRT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX)
907-
/*
908-
* This functions calculates the inputmux connection value
909-
* needed by INPUTMUX_EnableSignal to allow the UART's DMA
910-
* request to reach the DMA.
911-
*/
912-
static uint32_t fc_uart_calc_inmux_connection(uint8_t channel, DMA_Type *base)
913-
{
914-
uint32_t chmux_avl = 0;
915-
uint32_t chmux_sel = 0;
916-
uint32_t chmux_val = 0;
917-
918-
#if defined(CONFIG_SOC_SERIES_IMXRT5XX)
919-
uint32_t chmux_sel_id = 0;
920-
921-
if (base == (DMA_Type *)DMA0_BASE) {
922-
chmux_sel_id = DMA0_CHMUX_SEL0_ID;
923-
} else if (base == (DMA_Type *)DMA1_BASE) {
924-
chmux_sel_id = DMA1_CHMUX_SEL0_ID;
925-
}
926-
927-
928-
if (channel >= 16 && !(channel >= 24 && channel <= 27)) {
929-
chmux_avl = 1 << CHMUX_AVL_SHIFT;
930-
} else {
931-
chmux_avl = 0;
932-
}
933-
934-
/* 1 for flexcomm */
935-
chmux_val = 1 << CHMUX_VAL_SHIFT;
936-
937-
938-
if (channel <= 15 || (channel >= 24 && channel <= 27)) {
939-
chmux_sel = 0;
940-
} else if (channel >= 16 && channel <= 23) {
941-
chmux_sel = (chmux_sel_id + 4 * (channel - 16))
942-
<< CHMUX_OFF_SHIFT;
943-
} else {
944-
chmux_sel = (chmux_sel_id + 4 * (channel - 20))
945-
<< CHMUX_OFF_SHIFT;
946-
}
947-
948-
#endif /* RT5xx */
949-
950-
uint32_t req_en_id = 0;
951-
952-
if (base == (DMA_Type *)DMA0_BASE) {
953-
req_en_id = DMA0_REQ_ENA0_ID;
954-
} else if (base == (DMA_Type *)DMA1_BASE) {
955-
req_en_id = DMA1_REQ_ENA0_ID;
956-
}
957-
958-
959-
uint32_t en_val;
960-
961-
if (channel <= 31) {
962-
en_val = channel + (req_en_id << ENA_SHIFT);
963-
} else {
964-
en_val = (channel - 32) + ((req_en_id + 4) << ENA_SHIFT);
965-
}
966-
967-
968-
uint32_t ret = en_val + chmux_avl + chmux_val + chmux_sel;
969-
970-
return ret;
971-
}
972-
#endif /* RT 3-digit */
973-
974-
975909
static int flexcomm_uart_async_init(const struct device *dev)
976910
{
977911
const struct mcux_flexcomm_config *config = dev->config;
@@ -992,19 +926,9 @@ static int flexcomm_uart_async_init(const struct device *dev)
992926
USART_EnableRxDMA(config->base, false);
993927

994928
/* Route DMA requests */
995-
#if defined(CONFIG_SOC_SERIES_IMXRT5XX) || defined(CONFIG_SOC_SERIES_IMXRT6XX)
996-
/* RT 3 digit uses input mux to route DMA requests from
997-
* the UART peripheral to a hardware designated DMA channel
998-
*/
999-
INPUTMUX_Init(INPUTMUX);
1000-
INPUTMUX_EnableSignal(INPUTMUX,
1001-
fc_uart_calc_inmux_connection(config->rx_dma.channel,
1002-
config->rx_dma.base), true);
1003-
INPUTMUX_EnableSignal(INPUTMUX,
1004-
fc_uart_calc_inmux_connection(config->tx_dma.channel,
1005-
config->tx_dma.base), true);
1006-
INPUTMUX_Deinit(INPUTMUX);
1007-
#endif /* RT5xx and RT6xx */
929+
for (int i = 0; i < config->num_muxes; i++) {
930+
mux_configure_default(config->mux_dev, config->mux_controls[i]);
931+
}
1008932

1009933
/* Init work objects for RX and TX timeouts */
1010934
k_work_init_delayable(&data->tx_data.timeout_work,
@@ -1325,6 +1249,25 @@ static void mcux_flexcomm_##n##_pm_unlock(struct k_work *work) \
13251249
DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_TX_TIMEOUT_FUNC);
13261250
DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_RX_TIMEOUT_FUNC);
13271251

1252+
/* mux-controls is not used in this driver actually because its all just init once */
1253+
#define UART_MCUX_FLEXCOMM_MUX_CONTROL_DEFINE_IDX(node_id, pha, idx) \
1254+
MUX_CONTROL_DT_SPEC_DEFINE_BY_IDX(node_id, idx)
1255+
#define UART_MCUX_FLEXCOMM_MUX_CONTROL_DEFINE_ALL(n) \
1256+
DT_INST_FOREACH_PROP_ELEM(n, mux_states, \
1257+
UART_MCUX_FLEXCOMM_MUX_CONTROL_DEFINE_IDX)
1258+
DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_MUX_CONTROL_DEFINE_ALL)
1259+
1260+
#define UART_MCUX_FLEXCOMM_MUX_CONTROL_GET_IDX(node_id, pha, idx) \
1261+
MUX_CONTROL_DT_GET_BY_IDX(node_id, idx)
1262+
#define UART_MCUX_FLEXCOMM_MUX_CONTROL_LIST_DEFINE(n) \
1263+
static struct mux_control *fc_uart_##n##_muxes[] = { \
1264+
DT_INST_FOREACH_PROP_ELEM_SEP(n, mux_states, \
1265+
UART_MCUX_FLEXCOMM_MUX_CONTROL_GET_IDX, (,)) \
1266+
};
1267+
DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_MUX_CONTROL_LIST_DEFINE)
1268+
1269+
#define UART_MCUX_FLEXCOMM_GET_MUX_LIST(n) fc_uart_##n##_muxes
1270+
13281271
#define UART_MCUX_FLEXCOMM_ASYNC_CFG(n) \
13291272
.tx_dma = { \
13301273
.dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(n, tx)), \
@@ -1367,7 +1310,10 @@ DT_INST_FOREACH_STATUS_OKAY(UART_MCUX_FLEXCOMM_RX_TIMEOUT_FUNC);
13671310
DT_REG_ADDR(DT_INST_DMAS_CTLR_BY_NAME(n, rx)), \
13681311
}, \
13691312
.rx_timeout_func = mcux_flexcomm_uart_##n##_rx_timeout, \
1370-
.tx_timeout_func = mcux_flexcomm_uart_##n##_tx_timeout,
1313+
.tx_timeout_func = mcux_flexcomm_uart_##n##_tx_timeout, \
1314+
.mux_dev = DEVICE_DT_GET(DT_MUX_CTLR_BY_IDX(DT_DRV_INST(n), 0)), \
1315+
.mux_controls = UART_MCUX_FLEXCOMM_GET_MUX_LIST(n), \
1316+
.num_muxes = DT_INST_PROP_LEN(n, mux_states),
13711317
#else
13721318
#define UART_MCUX_FLEXCOMM_ASYNC_CFG(n)
13731319
#endif /* CONFIG_UART_ASYNC_API */

‎dts/arm/nxp/nxp_rt5xx_common.dtsi‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -160,6 +160,15 @@
160160
#reset-cells = <1>;
161161
};
162162

163+
inputmux: mux@26000 {
164+
compatible = "nxp,inputmux";
165+
reg = <0x26000 0x800>;
166+
#mux-control-cells = <2>;
167+
#mux-state-cells = <3>;
168+
clocks = <&clkctl1 MCUX_INPUTMUX_CLK>;
169+
resets = <&rstctl1 NXP_SYSCON_RESET(2, 31)>;
170+
};
171+
163172
uuid: uuid@2f50 {
164173
compatible = "nxp,lpc-uid";
165174
reg = <0x2f50 0x10>;
@@ -241,6 +250,7 @@
241250
interrupts = <14 0>;
242251
clocks = <&clkctl1 MCUX_FLEXCOMM0_CLK>;
243252
resets = <&rstctl1 NXP_SYSCON_RESET(0, 8)>;
253+
mux-states = <&inputmux 0x740 0x3 0x3>;
244254
status = "disabled";
245255
};
246256

@@ -358,6 +368,9 @@
358368
interrupts = <64 0>;
359369
clocks = <&clkctl1 MCUX_FLEXCOMM12_CLK>;
360370
resets = <&rstctl1 NXP_SYSCON_RESET(0, 20)>;
371+
mux-states = <&inputmux 0x744 0xc 0x3>,
372+
<&inputmux 0x358 0x1 0x1>,
373+
<&inputmux 0x35c 0x1 0x1>;
361374
status = "disabled";
362375
};
363376

‎dts/bindings/arm/nxp,lpc-flexcomm.yaml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ description: LPC Flexcomm node
55

66
compatible: "nxp,lpc-flexcomm"
77

8-
include: [base.yaml, pinctrl-device.yaml, reset-device.yaml]
8+
include: [base.yaml, pinctrl-device.yaml, reset-device.yaml, mux-consumer.yaml]
99

1010
properties:
1111
reg:

‎include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -129,4 +129,6 @@
129129
#define MCUX_LPSPI0_CLK MCUX_LPC_CLK_ID(0x17, 0x00)
130130
#define MCUX_LPSPI1_CLK MCUX_LPC_CLK_ID(0x17, 0x01)
131131

132+
#define MCUX_INPUTMUX_CLK MCUX_LPC_CLK_ID(0x18, 0x00)
133+
132134
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */

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