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GeorgeCGVkartben
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drivers: mipi_dbi: stm32: get fmc frequency correctly
Use clock api to get correct FMC clock frequency. Signed-off-by: Georgij Černyšiov <[email protected]>
1 parent 38c3225 commit 54e16c4

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+42
-3
lines changed

3 files changed

+42
-3
lines changed

drivers/memc/memc_stm32.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99

1010
#include <zephyr/drivers/clock_control/stm32_clock_control.h>
1111
#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/memc/memc_stm32.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(memc_stm32, CONFIG_MEMC_LOG_LEVEL);
@@ -86,6 +87,28 @@ static int memc_stm32_init(const struct device *dev)
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return 0;
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}
8889

90+
int memc_stm32_fmc_clock_rate(uint32_t *freq)
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{
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const struct device *dev = DEVICE_DT_GET_ONE(DT_DRV_COMPAT);
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const struct memc_stm32_config *config = dev->config;
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95+
if (IS_ENABLED(STM32_FMC_DOMAIN_CLOCK_SUPPORT) && (config->pclk_len > 1)) {
96+
if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t)&config->pclken[1],
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freq) < 0) {
99+
return -EIO;
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}
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} else {
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if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t)&config->pclken[0],
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freq) < 0) {
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return -EIO;
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}
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}
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return 0;
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}
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89112
PINCTRL_DT_INST_DEFINE(0);
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91114
static const struct stm32_pclken pclken[] = STM32_DT_INST_CLOCKS(0);

drivers/mipi_dbi/mipi_dbi_stm32_fmc.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/mipi_dbi.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include <zephyr/drivers/memc/memc_stm32.h>
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#include <zephyr/sys/barrier.h>
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#include <zephyr/sys/sys_io.h>
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#include <zephyr/sys/byteorder.h>
@@ -38,6 +39,7 @@ int mipi_dbi_stm32_fmc_check_config(const struct device *dev,
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const struct mipi_dbi_stm32_fmc_config *config = dev->config;
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struct mipi_dbi_stm32_fmc_data *data = dev->data;
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uint32_t fmc_write_cycles;
42+
uint32_t fmc_freq;
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4244
if (data->dbi_config == dbi_config) {
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return 0;
@@ -53,14 +55,16 @@ int mipi_dbi_stm32_fmc_check_config(const struct device *dev,
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return -EINVAL;
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}
5557

56-
uint32_t hclk_freq =
57-
STM32_AHB_PRESCALER * DT_PROP(STM32_CLOCK_CONTROL_NODE, clock_frequency);
58+
if (memc_stm32_fmc_clock_rate(&fmc_freq) < 0) {
59+
LOG_ERR("Unable to get FMC frequency");
60+
return -EINVAL;
61+
}
5862

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/* According to the FMC documentation*/
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fmc_write_cycles =
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((config->fmc_address_setup_time + 1) + (config->fmc_data_setup_time + 1)) * 1;
6266

63-
if (hclk_freq / fmc_write_cycles > dbi_config->config.frequency) {
67+
if (fmc_freq / fmc_write_cycles > dbi_config->config.frequency) {
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LOG_ERR("Frequency is too high for the display controller");
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return -EINVAL;
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}
Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
/*
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* Copyright (c) 2025 Georgij Cernysiov <[email protected]>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_MEMC_STM32_H_
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#define ZEPHYR_INCLUDE_MEMC_STM32_H_
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int memc_stm32_fmc_clock_rate(uint32_t *rate);
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#endif /* ZEPHYR_INCLUDE_MEMC_STM32_H_ */

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