@@ -420,10 +420,11 @@ static int siwx91x_dma_reload(const struct device *dev, uint32_t channel, uint32
420420 const struct dma_siwx91x_config * cfg = dev -> config ;
421421 struct dma_siwx91x_data * data = dev -> data ;
422422 void * udma_handle = & data -> udma_handle ;
423- uint32_t desc_src_addr ;
424- uint32_t desc_dst_addr ;
423+ void * desc_src_addr ;
424+ void * desc_dst_addr ;
425425 uint32_t length ;
426426 RSI_UDMA_DESC_T * udma_table = cfg -> sram_desc_addr ;
427+ uint8_t xfer_size = 1 << udma_table [channel ].vsUDMAChaConfigData1 .srcSize ;
427428
428429 /* Expecting a fixed channel number between 0-31 for dma0 and 0-11 for ulpdma */
429430 if (channel >= data -> dma_ctx .dma_channels ) {
@@ -438,31 +439,32 @@ static int siwx91x_dma_reload(const struct device *dev, uint32_t channel, uint32
438439 /* Update new channel info to dev->data structure */
439440 data -> chan_info [channel ].SrcAddr = src ;
440441 data -> chan_info [channel ].DestAddr = dst ;
441- data -> chan_info [channel ].Size = size ;
442+ data -> chan_info [channel ].Size = size / xfer_size ;
442443
443444 /* Update new transfer size to dev->data structure */
444- if (size >= DMA_MAX_TRANSFER_COUNT ) {
445- data -> chan_info [channel ].Cnt = DMA_MAX_TRANSFER_COUNT - 1 ;
445+ if (data -> chan_info [ channel ]. Size >= DMA_MAX_TRANSFER_COUNT ) {
446+ data -> chan_info [channel ].Cnt = DMA_MAX_TRANSFER_COUNT ;
446447 } else {
447- data -> chan_info [channel ].Cnt = size ;
448+ data -> chan_info [channel ].Cnt = size / xfer_size ;
448449 }
449450
450451 /* Program the DMA descriptors with new transfer data information. */
451452 if (udma_table [channel ].vsUDMAChaConfigData1 .srcInc != UDMA_SRC_INC_NONE ) {
452453 length = data -> chan_info [channel ].Cnt
453454 << udma_table [channel ].vsUDMAChaConfigData1 .srcInc ;
454- desc_src_addr = src + ( length - 1 );
455- udma_table [channel ].pSrcEndAddr = ( void * ) desc_src_addr ;
455+ desc_src_addr = ( void * )( src + length - 1 );
456+ udma_table [channel ].pSrcEndAddr = desc_src_addr ;
456457 }
457458
458459 if (udma_table [channel ].vsUDMAChaConfigData1 .dstInc != UDMA_SRC_INC_NONE ) {
459460 length = data -> chan_info [channel ].Cnt
460461 << udma_table [channel ].vsUDMAChaConfigData1 .dstInc ;
461- desc_dst_addr = dst + ( length - 1 );
462- udma_table [channel ].pDstEndAddr = ( void * ) desc_dst_addr ;
462+ desc_dst_addr = ( void * )( dst + length - 1 );
463+ udma_table [channel ].pDstEndAddr = desc_dst_addr ;
463464 }
464465
465- udma_table [channel ].vsUDMAChaConfigData1 .totalNumOfDMATrans = data -> chan_info [channel ].Cnt ;
466+ udma_table [channel ].vsUDMAChaConfigData1 .totalNumOfDMATrans =
467+ data -> chan_info [channel ].Cnt - 1 ;
466468 udma_table [channel ].vsUDMAChaConfigData1 .transferType = UDMA_MODE_BASIC ;
467469
468470 return 0 ;
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