drivers: adc: stm32 disable the ADC before setting the Resolution

On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to write the Data resolution (RES bits)
in the ADC_CFGR1 register only when ADC is disabled (ADEN=0).

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

drivers/adc/adc_stm32.c

@@ -409,10 +409,18 @@ static int start_read(const struct device *dev,
 		return err;
 	}
 
-#if defined(CONFIG_SOC_SERIES_STM32G0X)
+#if defined(CONFIG_SOC_SERIES_STM32G0X) || \
+	defined(CONFIG_SOC_SERIES_STM32G4X) || \
+	defined(CONFIG_SOC_SERIES_STM32H7X) || \
+	defined(CONFIG_SOC_SERIES_STM32L0X) || \
+	defined(CONFIG_SOC_SERIES_STM32L4X) || \
+	defined(CONFIG_SOC_SERIES_STM32L5X) || \
+	defined(CONFIG_SOC_SERIES_STM32WBX) || \
+	defined(CONFIG_SOC_SERIES_STM32WLX)
 	/*
 	 * Errata: Writing ADC_CFGR1 register while ADEN bit is set
 	 * resets RES[1:0] bitfield. We need to disable and enable adc.
+	 * On all those stm32 devices it is allowed to write these bits only when ADEN = 0.
 	 */
 	if (LL_ADC_IsEnabled(adc) == 1UL) {
 		LL_ADC_Disable(adc);