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dt-bindings: riscv: Add fine-grained IO memory PMP attributes
Introduce new macros to define bitfields for RISC-V Physical Memory Protection (PMP) attributes, specifically for specifying Read, Write, and Execute permissions for IO memory regions in device tree bindings. The following macros are added: - ATTR_RISCV_TYPE_IO_R: Read access (Bit 0) - ATTR_RISCV_TYPE_IO_W: Write access (Bit 1) - ATTR_RISCV_TYPE_IO_X: Execute access (Bit 2) Corresponding macros for device tree usage are also added: - DT_MEM_RISCV_TYPE_IO_R - DT_MEM_RISCV_TYPE_IO_W - DT_MEM_RISCV_TYPE_IO_X These macros allow device tree source files to precisely describe the intended access permissions for memory-mapped IO regions, enhancing the system's memory protection configuration. Signed-off-by: Firas Sammoura <[email protected]>
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include/zephyr/dt-bindings/memory-attr/memory-attr-riscv.h

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,18 +16,20 @@
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#define DT_MEM_RISCV_GET(x) ((x) & DT_MEM_RISCV_MASK)
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#define DT_MEM_RISCV(x) ((x) << DT_MEM_ARCH_ATTR_SHIFT)
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19-
#define ATTR_RISCV_TYPE_MAIN BIT(0)
20-
#define ATTR_RISCV_TYPE_IO BIT(1)
21-
#define ATTR_RISCV_TYPE_EMPTY BIT(2)
19+
#define ATTR_RISCV_TYPE_IO_R BIT(0)
20+
#define ATTR_RISCV_TYPE_IO_W BIT(1)
21+
#define ATTR_RISCV_TYPE_IO_X BIT(2)
22+
#define ATTR_RISCV_TYPE_MAIN (BIT(0) | BIT(1))
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#define ATTR_RISCV_AMO_SWAP BIT(3)
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#define ATTR_RISCV_AMO_LOGICAL BIT(4)
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#define ATTR_RISCV_AMO_ARITHMETIC BIT(5)
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#define ATTR_RISCV_IO_IDEMPOTENT_READ BIT(6)
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#define ATTR_RISCV_IO_IDEMPOTENT_WRITE BIT(7)
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29+
#define DT_MEM_RISCV_TYPE_IO_R DT_MEM_RISCV(ATTR_RISCV_TYPE_IO_R)
30+
#define DT_MEM_RISCV_TYPE_IO_W DT_MEM_RISCV(ATTR_RISCV_TYPE_IO_W)
31+
#define DT_MEM_RISCV_TYPE_IO_X DT_MEM_RISCV(ATTR_RISCV_TYPE_IO_X)
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#define DT_MEM_RISCV_TYPE_MAIN DT_MEM_RISCV(ATTR_RISCV_TYPE_MAIN)
29-
#define DT_MEM_RISCV_TYPE_IO DT_MEM_RISCV(ATTR_RISCV_TYPE_IO)
30-
#define DT_MEM_RISCV_TYPE_EMPTY DT_MEM_RISCV(ATTR_RISCV_TYPE_EMPTY)
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#define DT_MEM_RISCV_AMO_SWAP DT_MEM_RISCV(ATTR_RISCV_AMO_SWAP)
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#define DT_MEM_RISCV_AMO_LOGICAL DT_MEM_RISCV(ATTR_RISCV_AMO_LOGICAL)
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#define DT_MEM_RISCV_AMO_ARITHMETIC DT_MEM_RISCV(ATTR_RISCV_AMO_ARITHMETIC)

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