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dcpleungjhedberg
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soc: intel_adsp/ace: allows more spin relax loop per CPU
This allows adding the CPU ID to the number of NOPs in the custom arch_spin_relax(). With the same number of NOPs for all CPUs, it is possible to have them all doing RCW transactions at the same time over and over again if they enter and exit the spin relax loop at the same time. This behavior has been observed when doing lots of context switching, like in the SMP switching stress test. So adds a new kconfig to fine tune the relax loop behavior if needed. The new kconfig allows adding the CPU ID to the number of NOPs which will add some minimal offsetting to workaround the above mentioned situation. Signed-off-by: Daniel Leung <[email protected]>
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soc/intel/intel_adsp/ace/Kconfig

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@@ -53,3 +53,12 @@ config SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS
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help
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Specify the number of NOPs in Intel Audio DSP specific
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arch_spin_relax().
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config SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS_ADD_CPU_ID
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bool "Add CPU ID to offset NOPs"
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depends on SOC_SERIES_INTEL_ADSP_ACE_CUSTOM_MORE_SPIN_RELAX_NOPS
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help
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Add CPU ID to the number of NOPs in arch_spin_relax().
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This is to add some variations to the loop for each CPU to
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further avoid them hitting the RCW transactions at the same
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time.

soc/intel/intel_adsp/ace/spin_relax.c

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@@ -9,13 +9,20 @@
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#include <zephyr/toolchain.h>
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#include <zephyr/sys/util_macro.h>
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#include <zephyr/arch/xtensa/arch_inlines.h>
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#ifdef CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS
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void arch_spin_relax(void)
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{
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register uint32_t remaining = CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS;
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#if defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS_ADD_CPU_ID)
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remaining += arch_proc_id();
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#endif /* CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS_ADD_CPU_ID */
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while (remaining > 0) {
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#if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS % 4) == 0
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#if !defined(CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS_ADD_CPU_ID) && \
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(CONFIG_SOC_SERIES_INTEL_ADSP_ACE_NUM_SPIN_RELAX_NOPS % 4) == 0
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remaining -= 4;
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/*

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