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lines changed Original file line number Diff line number Diff line change @@ -12,4 +12,7 @@ config GPIO_MCP230XX_INIT_PRIORITY
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endif # GPIO_MCP230XX
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+ config NET_L2_ETHERNET
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+ default y if NETWORKING
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+
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endif # BOARD_STM32MP135F_DK
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gpio-map = <CSI_IO0 0 &mcp23017 4 0>,
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<CSI_IO1 0 &mcp23017 3 0>;
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};
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+
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+ eth_ram: sram@30000000 {
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+ compatible = "zephyr,memory-region", "mmio-sram";
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+ reg = <0x2FFE0000 DT_SIZE_K(16)>;
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+ #memory-region-cells = <0>;
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+ zephyr,memory-region = "ETH_SRAM";
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+ };
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};
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&clk_hsi {
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status = "okay";
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};
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+ &pll4 {
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+ clocks = <&clk_hsi>;
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+ div-m = <2>;
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+ mul-n = <50>;
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+ div-p = <12>;
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+ div-q = <60>;
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+ div-r = <6>;
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+ fracn = <0>;
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+ status = "okay";
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+ };
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+
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&rcc {
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clock-frequency = <DT_FREQ_M(1000)>;
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clocks = <&pll>;
@@ -250,3 +268,30 @@ csi_interface: &dcmipp {
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status = "disabled";
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};
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+
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+ &mac {
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+ status = "okay";
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+ pinctrl-0 = <ð1_txd0_pg13
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+ ð1_txd1_pg14
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+ ð1_tx_ctl_pb11
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+ ð1_ref_clk_pa1
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+ ð1_rxd0_pc4
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+ ð1_rxd1_pc5
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+ ð1_crs_dv_pc1>;
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+ pinctrl-names = "default";
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+ phy-connection-type = "rmii";
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+ phy-handle = <ð_phy>;
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+ memory-regions = <ð_ram>;
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+ };
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+
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+ &mdio {
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+ status = "okay";
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+ pinctrl-0 = <ð1_mdio_pa2 ð1_mdc_pg2>;
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+ pinctrl-names = "default";
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+
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+ eth_phy: ethernet-phy@0 {
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+ compatible = "microchip,lan8742";
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+ reg = <0>;
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+ reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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