boards: frdm_mcxw71: Enable ADC and tests/sample

Enable LPADC on the FRDM_MCXW71 and add overlays for tests and sample

Signed-off-by: Declan Snyder <[email protected]>

Author: decsny

boards/nxp/frdm_mcxw71/doc/index.rst

@@ -66,6 +66,8 @@ The ``frdm_mcxw71`` board target in Zephyr currently supports the following feat
 +-----------+------------+-------------------------------------+
 | VREF      | on-chip    | regulator                           |
 +-----------+------------+-------------------------------------+
+| LPADC     | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
 
 Fetch Binary Blobs
 ******************

boards/nxp/frdm_mcxw71/frdm_mcxw71-pinctrl.dtsi

@@ -58,4 +58,14 @@
 			drive-strength = "low";
 		};
 	};
+
+	pinmux_lpadc0: pinmux_lpadc0 {
+		group0 {
+			pinmux = <ADC0_A6_PTD2>,
+				<ADC0_B6_PTD3>,
+				<ADC0_B5_PTD1>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
 };

boards/nxp/frdm_mcxw71/frdm_mcxw71.dts

@@ -131,3 +131,9 @@
 		max-bitrate = <5000000>;
 	};
 };
+
+&adc0 {
+	pinctrl-0 = <&pinmux_lpadc0>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/nxp/frdm_mcxw71/frdm_mcxw71.yaml

@@ -20,3 +20,4 @@ supported:
   - i2c
   - can
   - regulator
+  - adc

samples/drivers/adc/adc_dt/boards/frdm_mcxw71.overlay

@@ -0,0 +1,29 @@
+/*
+ * Copyright 2024 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		io-channels = <&adc0 0>;
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL1";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+		zephyr,vref-mv = <1800>;
+		/* channel 2 signal 6A */
+		zephyr,input-positive = <MCUX_LPADC_CH2A>;
+	};
+};

tests/drivers/adc/adc_api/boards/frdm_mcxw71.overlay

@@ -0,0 +1,29 @@
+/*
+ * Copyright 2024 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+
+/ {
+	zephyr,user {
+		io-channels = <&adc0 0>;
+	};
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL1";
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+		zephyr,vref-mv = <1800>;
+		/* channel 2 signal 6A */
+		zephyr,input-positive = <MCUX_LPADC_CH2A>;
+	};
+};

tests/drivers/regulator/voltage/boards/frdm_mcxw71.overlay

@@ -0,0 +1,48 @@
+/*
+ * Copyright 2024 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/adc/adc.h>
+#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
+#include <zephyr/dt-bindings/regulator/nxp_vref.h>
+
+/* To do this test, connect LPADC0 channel 6A(J4 pin 5) to VREF_OUT (J2 pin 3) */
+
+/ {
+	resources: resources {
+		compatible = "test-regulator-voltage";
+		regulators = <&vref>;
+		tolerance-microvolt = <40000>;
+		set-read-delay-ms = <1>;
+		adc-avg-count = <10>;
+		io-channels = <&adc0 0>;
+		min-microvolt = <1000000>;
+		max-microvolt = <2100000>;
+	};
+};
+
+&vref {
+	regulator-initial-mode = <NXP_VREF_MODE_INTERNAL_REGULATOR>;
+};
+
+&adc0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	/* In this case, the LPADC reference source cannot be set to VREFO,
+	 * switch the reference source to VDD_ANA.
+	 */
+	voltage-ref= <0>;
+
+	channel@0 {
+		reg = <0>;
+		zephyr,gain = "ADC_GAIN_1";
+		zephyr,reference = "ADC_REF_EXTERNAL0";
+		zephyr,vref-mv = <3300>;
+		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
+		zephyr,resolution = <12>;
+		/* the signal name is ADC0_A6 but it is still channel 2 */
+		zephyr,input-positive = <MCUX_LPADC_CH2A>;
+	};
+};