soc: riscv: esp32c3: update west version

Felipe Neves · cfriedt · commit 6020afe46a77 · 2021-09-30T06:39:55.000-04:00
to enable wifi subsystem for esp32c3, also
update the linker with proper wlog sections.

Signed-off-by: Felipe Neves &lt;felipe.neves@espressif.com&gt;
diff --git a/boards/riscv/esp32c3_devkitm/Kconfig.defconfig b/boards/riscv/esp32c3_devkitm/Kconfig.defconfig
@@ -19,4 +19,4 @@ choice BT_HCI_BUS_TYPE
 	default BT_ESP32
 endchoice
 
-endif # BT
+endif # BT
diff --git a/soc/riscv/esp32c3/linker.ld b/soc/riscv/esp32c3/linker.ld
@@ -309,6 +309,8 @@ SECTIONS
     *(".srodata.*")
     *(.rodata)
     *(.rodata.*)
+    *(.rodata_wlog)
+    *(.rodata_wlog*)
     _thread_local_end = ABSOLUTE(.);
     _rodata_reserved_end = ABSOLUTE(.);
     . = ALIGN(4);
diff --git a/west.yml b/west.yml
@@ -62,7 +62,7 @@ manifest:
       groups:
         - hal
     - name: hal_espressif
-      revision: 6cb37487b6ee42f96b4ba0d4719bb5759b098822
+      revision: 2f438dfde14900d35bf703ddc4c0f71efc0d065f
       path: modules/hal/espressif
       west-commands: west/west-commands.yml
       groups:
