arch/riscv: Reset MSTATUS before configuring PMP

The PMP configuration must be performed with M-mode privileges to ensure
PMP CSRs (Control and Status Registers) can be correctly accessed and
written.

Firmwares that utilize multi-stage or memory-relocating boot sequences
(e.g., jumping between Read-Only and Read-Write images) might enter the
kernel with a non-default `mstatus` configuration left over from the
previous execution environment.

This commit ensures that the necessary M-mode privilege state is
asserted before PMP registers are initialized, guaranteeing consistency
and correctness in the hardware protection setup by clearing the
`MSTATUS_MPRV` and setting the `MSTATUS_MPP` bits.

Signed-off-by: Firas Sammoura <[email protected]>

Author: fsammoura1980

arch/riscv/core/pmp.c

@@ -350,6 +350,14 @@ static unsigned int global_pmp_end_index;
  */
 void z_riscv_pmp_init(void)
 {
+	/*
+	 * Ensure we are in M-mode and that memory accesses use M-mode privileges
+	 * (MPRV=0) before configuring PMP registers. The PMP registers are
+	 * accessible only in M-mode.
+	 */
+	csr_clear(mstatus, MSTATUS_MPRV);
+	csr_set(mstatus, MSTATUS_MPP);
+
 	unsigned long pmp_addr[CONFIG_PMP_SLOTS];
 	unsigned long pmp_cfg[CONFIG_PMP_SLOTS / PMPCFG_STRIDE];
 	unsigned int index = 0;