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drivers: gpio: initial device driver for ENE KB1200
Add GPIO driver for ENE KB1200 Signed-off-by: Steven Chang <[email protected]>
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‎drivers/gpio/CMakeLists.txt

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@@ -89,6 +89,7 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_TLE9104 gpio_tle9104.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_ALTERA_PIO gpio_altera_pio.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_BCM2711 gpio_bcm2711.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_RENESAS_RA gpio_renesas_ra.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_ENE_KB1200 gpio_ene_kb1200.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_RZT2M gpio_rzt2m.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_AMBIQ gpio_ambiq.c)
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‎drivers/gpio/Kconfig

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@@ -236,6 +236,8 @@ source "drivers/gpio/Kconfig.bcm2711"
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source "drivers/gpio/Kconfig.renesas_ra"
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source "drivers/gpio/Kconfig.ene"
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source "drivers/gpio/Kconfig.rzt2m"
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source "drivers/gpio/Kconfig.ambiq"

‎drivers/gpio/Kconfig.ene

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# Copyright (c) 2024 ENE Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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config GPIO_ENE_KB1200
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bool "ENE KB1200 GPIO Driver"
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default y
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depends on DT_HAS_ENE_KB1200_GPIO_ENABLED
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help
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Enable support for the kb1200 GPIO controllers.

‎drivers/gpio/gpio_ene_kb1200.c

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/*
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* Copyright (c) 2023 ENE Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT ene_kb1200_gpio
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/sys/util_macro.h>
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#include <reg/gpio.h>
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#include <reg/gptd.h>
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struct gpio_kb1200_data {
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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sys_slist_t cb;
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};
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struct gpio_kb1200_config {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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/* base address of GPIO port */
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struct gpio_regs *gpio_regs;
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struct gptd_regs *gptd_regs;
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};
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static void gpio_kb1200_isr(const struct device *dev)
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{
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const struct gpio_kb1200_config *config = dev->config;
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struct gpio_kb1200_data *context = dev->data;
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uint32_t pending_flag = config->gptd_regs->GPTDPF;
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gpio_fire_callbacks(&context->cb, dev, pending_flag);
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config->gptd_regs->GPTDPF |= pending_flag;
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}
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static int kb1200_gpio_pin_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
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{
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const struct gpio_kb1200_config *config = dev->config;
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WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0);
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if ((flags & GPIO_OUTPUT) != 0) {
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WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1);
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if ((flags & GPIO_SINGLE_ENDED) != 0) {
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if (flags & GPIO_LINE_OPEN_DRAIN) {
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1);
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}
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} else {
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WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0);
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}
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if (flags & GPIO_PULL_UP) {
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1);
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} else {
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0);
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}
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0) {
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WRITE_BIT(config->gpio_regs->GPIOD, pin, 1);
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0) {
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WRITE_BIT(config->gpio_regs->GPIOD, pin, 0);
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}
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WRITE_BIT(config->gpio_regs->GPIOOE, pin, 1);
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} else {
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WRITE_BIT(config->gpio_regs->GPIOOE, pin, 0);
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if (flags & GPIO_PULL_UP) {
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1);
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} else {
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WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0);
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}
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WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1);
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}
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return 0;
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}
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static int kb1200_gpio_port_get_raw(const struct device *dev, gpio_port_value_t *value)
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{
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const struct gpio_kb1200_config *config = dev->config;
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*value = config->gpio_regs->GPIOIN;
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return 0;
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}
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static int kb1200_gpio_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask,
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gpio_port_value_t value)
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{
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const struct gpio_kb1200_config *config = dev->config;
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config->gpio_regs->GPIOD |= (value & mask);
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return 0;
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}
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static int kb1200_gpio_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins)
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{
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const struct gpio_kb1200_config *config = dev->config;
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config->gpio_regs->GPIOD |= pins;
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return 0;
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}
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static int kb1200_gpio_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins)
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{
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const struct gpio_kb1200_config *config = dev->config;
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config->gpio_regs->GPIOD &= ~pins;
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return 0;
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}
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static int kb1200_gpio_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
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{
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const struct gpio_kb1200_config *config = dev->config;
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config->gpio_regs->GPIOD ^= pins;
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return 0;
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}
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static int kb1200_gpio_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin,
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enum gpio_int_mode mode, enum gpio_int_trig trig)
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{
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const struct gpio_kb1200_config *config = dev->config;
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/* Check if GPIO port needs interrupt support */
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if ((mode & GPIO_INT_DISABLE) || (mode & GPIO_INT_ENABLE) == 0) {
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/* Set the mask to disable the interrupt */
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WRITE_BIT(config->gptd_regs->GPTDIE, pin, 0);
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} else {
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if (mode & GPIO_INT_EDGE) {
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WRITE_BIT(config->gptd_regs->GPTDEL, pin, 0);
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if (trig & GPIO_INT_HIGH_1) {
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if (trig & GPIO_INT_LOW_0) { /* Falling & Rising edge trigger */
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/* Enable toggle trigger */
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 1);
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} else { /* Rising edge */
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/* Disable toggle trigger */
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1);
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}
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} else { /* Falling edge */
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/* Disable Toggle trigger */
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0);
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}
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} else {
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WRITE_BIT(config->gptd_regs->GPTDEL, pin, 1);
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/* Disable Toggle trigger */
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WRITE_BIT(config->gptd_regs->GPTDCHG, pin, 0);
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if (trig & GPIO_INT_HIGH_1) {
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 1);
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} else {
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WRITE_BIT(config->gptd_regs->GPTDPS, pin, 0);
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}
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}
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/* clear pending flag */
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WRITE_BIT(config->gptd_regs->GPTDPF, pin, 1);
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/* Enable the interrupt */
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WRITE_BIT(config->gptd_regs->GPTDIE, pin, 1);
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}
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return 0;
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}
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static int kb1200_gpio_manage_callback(const struct device *dev, struct gpio_callback *cb, bool set)
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{
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struct gpio_kb1200_data *context = dev->data;
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gpio_manage_callback(&context->cb, cb, set);
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return 0;
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}
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static uint32_t kb1200_gpio_get_pending_int(const struct device *dev)
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{
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const struct gpio_kb1200_config *const config = dev->config;
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return config->gptd_regs->GPTDPF;
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}
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static const struct gpio_driver_api kb1200_gpio_api = {
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.pin_configure = kb1200_gpio_pin_configure,
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.port_get_raw = kb1200_gpio_port_get_raw,
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.port_set_masked_raw = kb1200_gpio_port_set_masked_raw,
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.port_set_bits_raw = kb1200_gpio_port_set_bits_raw,
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.port_clear_bits_raw = kb1200_gpio_port_clear_bits_raw,
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.port_toggle_bits = kb1200_gpio_port_toggle_bits,
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.pin_interrupt_configure = kb1200_gpio_pin_interrupt_configure,
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.manage_callback = kb1200_gpio_manage_callback,
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.get_pending_int = kb1200_gpio_get_pending_int,
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};
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#define KB1200_GPIO_INIT(n) \
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static int kb1200_gpio_##n##_init(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 0, irq), DT_INST_IRQ_BY_IDX(n, 0, priority), \
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gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQ_BY_IDX(n, 0, irq)); \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, 1, irq), DT_INST_IRQ_BY_IDX(n, 1, priority), \
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gpio_kb1200_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQ_BY_IDX(n, 1, irq)); \
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return 0; \
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}; \
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static const struct gpio_kb1200_config port_##n##_kb1200_config = { \
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.common = {.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n)}, \
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.gpio_regs = (struct gpio_regs *)DT_INST_REG_ADDR_BY_IDX(n, 0), \
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.gptd_regs = (struct gptd_regs *)DT_INST_REG_ADDR_BY_IDX(n, 1), \
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}; \
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static struct gpio_kb1200_data gpio_kb1200_##n##_data; \
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DEVICE_DT_INST_DEFINE(n, &kb1200_gpio_##n##_init, NULL, &gpio_kb1200_##n##_data, \
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&port_##n##_kb1200_config, POST_KERNEL, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &kb1200_gpio_api);
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DT_INST_FOREACH_STATUS_OKAY(KB1200_GPIO_INIT)

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