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soc: cyw20829: add support of Secure LCS
Enable support of SECURE LCS stage. In this stage, the protection state is set to “secure”. A secured device will boot only when the authentication of its flash boot and application code succeeds Signed-off-by: Sreeram Tatapudi <[email protected]>
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3 files changed

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soc/infineon/cat1b/cyw20829/CMakeLists.txt

Lines changed: 75 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@ zephyr_compile_definitions(COMPONENT_CM33)
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zephyr_compile_definitions(FLASH_BOOT)
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zephyr_compile_definitions(CY_PDL_FLASH_BOOT)
1818

19+
set(user_app_start_offset 0)
20+
1921
# Use custome linker script
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/soc/infineon/cat1b/cyw20829/linker.ld CACHE INTERNAL "")
2123

@@ -24,12 +26,76 @@ dt_nodelabel(sram_bootstrap NODELABEL "sram_bootstrap")
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dt_reg_addr(bootstrap_dst_addr PATH ${sram_bootstrap})
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dt_reg_size(bootstrap_size PATH ${sram_bootstrap})
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29+
set(gen_app_header_args)
30+
set(app_signed_enc_path ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME})
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if(CONFIG_INFINEON_SECURE_LCS OR (DEFINED CONFIG_MCUBOOT_ENCRYPTION_KEY_FILE) OR (DEFINED CONFIG_MCUBOOT_SIGNATURE_KEY_FILE))
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# Check cysecuretools
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find_program(CYSECURETOOLS cysecuretools REQUIRED)
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message("-- Found cysecuretools: ${CYSECURETOOLS}")
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set(user_app_start_offset 0x400)
38+
39+
# Locate CySecureTools policy file
40+
if(IS_ABSOLUTE "${CONFIG_INFINEON_SECURE_POLICY}")
41+
cmake_path(SET cysecuretools_policy "${CONFIG_INFINEON_SECURE_POLICY}")
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else()
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find_file(
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cysecuretools_policy
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NAMES
46+
"${CONFIG_INFINEON_SECURE_POLICY}"
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PATHS
48+
"${APPLICATION_SOURCE_DIR}"
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"${WEST_TOPDIR}"
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"${SOC_FULL_DIR}/cyw20829"
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NO_DEFAULT_PATH
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)
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endif()
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55+
if(NOT IS_ABSOLUTE "${cysecuretools_policy}" OR NOT EXISTS "${cysecuretools_policy}")
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message(FATAL_ERROR "Can't find policy file \"${CONFIG_INFINEON_SECURE_POLICY}\" "
57+
"(Note: Relative paths are searched through "
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"APPLICATION_SOURCE_DIR=\"${APPLICATION_SOURCE_DIR}\" "
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"and WEST_TOPDIR=\"${WEST_TOPDIR}\")")
60+
endif()
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62+
message("-- Using cysecuretools policy: ${cysecuretools_policy}")
63+
set(CYSECURETOOLS_POLICY ${cysecuretools_policy} CACHE PATH "cysecuretool policy")
64+
endif()
65+
66+
if(CONFIG_INFINEON_SECURE_LCS)
67+
#
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# Additional postbuild action for SECURE LCS
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#
70+
set(gen_app_header_args ${gen_app_header_args} --secure_lcs True)
71+
set(app_signed_path ${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.signed)
72+
set(app_signed_enc_path "${app_signed_path}")
73+
74+
if(CONFIG_INFINEON_SMIF_ENCRYPTION)
75+
set(gen_app_header_args ${gen_app_header_args} --smif-config ${ZEPHYR_BINARY_DIR}/nonce-output.bin)
76+
set(enc_option --encrypt --nonce-output nonce-output.bin)
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# The encrypted image file path generated by cysecuretools
78+
set(app_signed_enc_path "${app_signed_path}_encrypted")
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endif()
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81+
set(bin2hex_option bin2hex --image ${app_signed_enc_path}.bin --output ${app_signed_enc_path}.hex --offset 0x60000030)
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# Sign Zephyr L1 app in SECURE LCS
84+
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
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COMMAND ${CYSECURETOOLS} -q -t cyw20829
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-p ${cysecuretools_policy} sign-image --image-format bootrom_next_app
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-i ${ZEPHYR_BINARY_DIR}/${KERNEL_BIN_NAME} -k 0 -o ${app_signed_path}.bin
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--slot-size ${CONFIG_FLASH_LOAD_SIZE} --app-addr 0x08000030
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${enc_option} ${bin2hex_option}
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)
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endif()
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2793
# Calculate the place in flash
2894
math(EXPR flash_addr_offset
29-
"${CONFIG_CYW20829_FLASH_SAHB_ADDR} + ${CONFIG_FLASH_LOAD_OFFSET} + ${CONFIG_ROM_START_OFFSET}"
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"${CONFIG_CYW20829_FLASH_SAHB_ADDR} + ${CONFIG_FLASH_LOAD_OFFSET} + ${user_app_start_offset}"
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OUTPUT_FORMAT HEXADECIMAL
3197
)
32-
set(gen_app_header_args --flash_addr_offset ${flash_addr_offset})
98+
set(gen_app_header_args ${gen_app_header_args} --flash_addr_offset ${flash_addr_offset} )
3399

34100
# Generate platform specific header (TOC2, l1_desc, etc)
35101
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands COMMAND
@@ -45,7 +111,13 @@ set(MERGED_FILE ${CMAKE_BINARY_DIR}/zephyr/zephyr_merged.hex CACHE PATH "merged
45111
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
46112
COMMAND ${PYTHON_EXECUTABLE} ${ZEPHYR_BASE}/scripts/build/mergehex.py
47113
-o ${MERGED_FILE}
48-
${ZEPHYR_BINARY_DIR}/${KERNEL_NAME}.hex ${ZEPHYR_BINARY_DIR}/app_header.hex
114+
${app_signed_enc_path}.hex ${ZEPHYR_BINARY_DIR}/app_header.hex
49115
)
50116

51117
set_property(GLOBAL APPEND PROPERTY extra_post_build_byproducts ${MERGED_FILE})
118+
119+
# Use custom mcuboot cmake for sign/encrypt by using cysecuretools
120+
if(CONFIG_BOOTLOADER_MCUBOOT)
121+
set_target_properties(zephyr_property_target PROPERTIES SIGNING_SCRIPT
122+
${CMAKE_CURRENT_LIST_DIR}/mcuboot.cmake)
123+
endif()

soc/infineon/cat1b/cyw20829/Kconfig

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,27 @@ config SOC_SERIES_CYW20829
1717
select BUILD_OUTPUT_BIN
1818
select SOC_EARLY_INIT_HOOK
1919

20+
config INFINEON_SECURE_LCS
21+
bool "Secure LCS stage support"
22+
help
23+
Enable support of SECURE LCS stage. In this stage, the protection
24+
state is set to “secure”. A secured device will boot only when the
25+
authentication of its flash boot and application code succeeds.
26+
27+
config INFINEON_SECURE_POLICY
28+
string "Path to policy JSON file"
29+
default "default_policy.json"
30+
help
31+
Policy is a text file in JSON format that contains a set of properties
32+
for the device configuration (e.g., enabling/disabling debug access ports,
33+
SMIF configuration, keys information, etc).
34+
35+
config INFINEON_SMIF_ENCRYPTION
36+
bool "SMIF encryption support"
37+
depends on INFINEON_SECURE_LCS
38+
help
39+
Enables SMIF encryption.
40+
2041
config CYW20829_FLASH_SAHB_ADDR
2142
hex
2243
default $(dt_nodelabel_reg_addr_hex,flash_sahb)

tests/application_development/vector_table_relocation/src/main.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@
2727

2828
#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
2929
#include <cmsis_core.h>
30-
void disable_mpu_rasr_xn(void)
30+
static void disable_mpu_rasr_xn(void)
3131
{
3232
uint32_t index;
3333
/* Kept the max index as 8(irrespective of soc) because the sram

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