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| 1 | +/* |
| 2 | + * Copyright The Zephyr Project Contributors |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +/dts-v1/; |
| 8 | +#include <silabs/xg22/bgm220pc22hna.dtsi> |
| 9 | +#include <dt-bindings/adc/silabs-adc.h> |
| 10 | +#include <zephyr/dt-bindings/input/input-event-codes.h> |
| 11 | +#include <zephyr/dt-bindings/pwm/pwm.h> |
| 12 | +#include <zephyr/dt-bindings/regulator/silabs_dcdc.h> |
| 13 | +#include "bgm220_ek4314a-pinctrl.dtsi" |
| 14 | + |
| 15 | +/ { |
| 16 | + model = "Silicon Labs BRD4314A (BGM220 Explorer Kit)"; |
| 17 | + compatible = "silabs,bgm220_ek4314a", "silabs,efr32bg22"; |
| 18 | + |
| 19 | + chosen { |
| 20 | + zephyr,bt-hci = &bt_hci_silabs; |
| 21 | + zephyr,code-partition = &slot0_partition; |
| 22 | + zephyr,console = &usart1; |
| 23 | + zephyr,flash = &flash0; |
| 24 | + zephyr,shell-uart = &usart1; |
| 25 | + zephyr,sram = &sram0; |
| 26 | + zephyr,uart-pipe = &usart1; |
| 27 | + }; |
| 28 | + |
| 29 | + aliases { |
| 30 | + led0 = &led0; |
| 31 | + pwm-led0 = &pwm_led0; |
| 32 | + sw0 = &button0; |
| 33 | + watchdog0 = &wdog0; |
| 34 | + |
| 35 | + /* If enabled, MCUboot uses this for recovery mode entrance */ |
| 36 | + mcuboot-led0 = &led0; |
| 37 | + mcuboot-button0 = &button0; |
| 38 | + }; |
| 39 | + |
| 40 | + buttons { |
| 41 | + compatible = "gpio-keys"; |
| 42 | + |
| 43 | + button0: button_0 { |
| 44 | + gpios = <&gpioc 7 GPIO_ACTIVE_LOW>; |
| 45 | + zephyr,code = <INPUT_KEY_0>; |
| 46 | + }; |
| 47 | + }; |
| 48 | + |
| 49 | + leds { |
| 50 | + compatible = "gpio-leds"; |
| 51 | + |
| 52 | + led0: led_0 { |
| 53 | + gpios = <&gpioa 4 GPIO_ACTIVE_HIGH>; |
| 54 | + }; |
| 55 | + }; |
| 56 | + |
| 57 | + mikrobus_header: mikrobus-connector { |
| 58 | + compatible = "mikro-bus"; |
| 59 | + #gpio-cells = <2>; |
| 60 | + gpio-map-mask = <0xffffffff 0>; |
| 61 | + gpio-map-pass-thru = <0 GPIO_DT_FLAGS_MASK>; |
| 62 | + gpio-map = <0 0 &gpiob 0 0>, /* AN */ |
| 63 | + <1 0 &gpioc 6 0>, /* RST */ |
| 64 | + <2 0 &gpioc 3 0>, /* CS */ |
| 65 | + <3 0 &gpioc 2 0>, /* SCK */ |
| 66 | + <4 0 &gpioc 1 0>, /* MISO */ |
| 67 | + <5 0 &gpioc 0 0>, /* MOSI */ |
| 68 | + <6 0 &gpiob 4 0>, /* PWM */ |
| 69 | + <7 0 &gpiob 3 0>, /* INT */ |
| 70 | + <8 0 &gpiob 2 0>, /* RX */ |
| 71 | + <9 0 &gpiob 1 0>, /* TX */ |
| 72 | + <10 0 &gpiod 2 0>, /* SCL */ |
| 73 | + <11 0 &gpiod 3 0>; /* SDA */ |
| 74 | + }; |
| 75 | + |
| 76 | + pwmleds { |
| 77 | + compatible = "pwm-leds"; |
| 78 | + |
| 79 | + pwm_led0: pwm_led_0 { |
| 80 | + pwms = <&timer0_pwm 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + qwiic_connector: stemma-qt-connector { |
| 85 | + compatible = "stemma-qt-connector"; |
| 86 | + #gpio-cells = <2>; |
| 87 | + gpio-map-mask = <0xffffffff 0>; |
| 88 | + gpio-map-pass-thru = <0 GPIO_DT_FLAGS_MASK>; |
| 89 | + gpio-map = <0 0 &gpiod 2 0>, /* SCL */ |
| 90 | + <1 0 &gpiod 3 0>; /* SDA */ |
| 91 | + }; |
| 92 | + |
| 93 | + mikrobus_adc: zephyr,user { |
| 94 | + io-channels = <&adc0 0>; |
| 95 | + }; |
| 96 | +}; |
| 97 | + |
| 98 | +&timer0 { |
| 99 | + status = "okay"; |
| 100 | + |
| 101 | + timer0_pwm: pwm { |
| 102 | + pinctrl-0 = <&timer0_default>; |
| 103 | + pinctrl-names = "default"; |
| 104 | + status = "okay"; |
| 105 | + }; |
| 106 | +}; |
| 107 | + |
| 108 | + |
| 109 | +&timer1 { |
| 110 | + status = "okay"; |
| 111 | + |
| 112 | + zephyr_pwm: timer1_pwm: pwm { |
| 113 | + pinctrl-0 = <&timer1_default>; |
| 114 | + pinctrl-names = "default"; |
| 115 | + status = "okay"; |
| 116 | + }; |
| 117 | +}; |
| 118 | + |
| 119 | +&cpu0 { |
| 120 | + clock-frequency = <76800000>; |
| 121 | +}; |
| 122 | + |
| 123 | +&itm { |
| 124 | + pinctrl-0 = <&itm_default>; |
| 125 | + pinctrl-names = "default"; |
| 126 | + swo-ref-frequency = <DT_FREQ_K(76800)>; |
| 127 | +}; |
| 128 | + |
| 129 | +&dcdc { |
| 130 | + regulator-boot-on; |
| 131 | + regulator-initial-mode = <SILABS_DCDC_MODE_BUCK>; |
| 132 | + status = "okay"; |
| 133 | +}; |
| 134 | + |
| 135 | +&hfrcodpll { |
| 136 | + clock-frequency = <DT_FREQ_K(76800)>; |
| 137 | + clocks = <&hfxo>; |
| 138 | + dpll-autorecover; |
| 139 | + dpll-edge = "fall"; |
| 140 | + dpll-lock = "phase"; |
| 141 | + dpll-m = <1919>; |
| 142 | + dpll-n = <3839>; |
| 143 | +}; |
| 144 | + |
| 145 | +&euart0 { |
| 146 | + pinctrl-0 = <&euart0_default>; |
| 147 | + pinctrl-names = "default"; |
| 148 | + status = "disabled"; |
| 149 | +}; |
| 150 | + |
| 151 | +&usart0 { |
| 152 | + pinctrl-0 = <&usart0_default>; |
| 153 | + pinctrl-names = "default"; |
| 154 | + status = "disabled"; |
| 155 | +}; |
| 156 | + |
| 157 | +&usart1 { |
| 158 | + pinctrl-0 = <&usart1_default>; |
| 159 | + pinctrl-names = "default"; |
| 160 | + status = "okay"; |
| 161 | +}; |
| 162 | + |
| 163 | +&i2c0 { |
| 164 | + pinctrl-0 = <&i2c0_default>; |
| 165 | + pinctrl-names = "default"; |
| 166 | + status = "disabled"; |
| 167 | +}; |
| 168 | + |
| 169 | +&wdog0 { |
| 170 | + status = "okay"; |
| 171 | +}; |
| 172 | + |
| 173 | +&gpio { |
| 174 | + status = "okay"; |
| 175 | +}; |
| 176 | + |
| 177 | +&gpioa { |
| 178 | + status = "okay"; |
| 179 | +}; |
| 180 | + |
| 181 | +&gpiob { |
| 182 | + status = "okay"; |
| 183 | +}; |
| 184 | + |
| 185 | +&gpioc { |
| 186 | + status = "okay"; |
| 187 | +}; |
| 188 | + |
| 189 | +&gpiod { |
| 190 | + status = "okay"; |
| 191 | +}; |
| 192 | + |
| 193 | +&rtcc0 { |
| 194 | + status = "okay"; |
| 195 | +}; |
| 196 | + |
| 197 | +&adc0 { |
| 198 | + pinctrl-0 = <&iadc0_default>; |
| 199 | + pinctrl-names = "default"; |
| 200 | + #address-cells = <1>; |
| 201 | + #size-cells = <0>; |
| 202 | + status = "okay"; |
| 203 | + |
| 204 | + channel@0 { |
| 205 | + reg = <0>; |
| 206 | + zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; |
| 207 | + zephyr,gain = "ADC_GAIN_1"; |
| 208 | + zephyr,input-positive = <IADC_INPUT_PB0>; |
| 209 | + zephyr,reference = "ADC_REF_VDD_1"; |
| 210 | + zephyr,resolution = <12>; |
| 211 | + zephyr,vref-mv = <3300>; |
| 212 | + }; |
| 213 | +}; |
| 214 | + |
| 215 | +&trng { |
| 216 | + status = "okay"; |
| 217 | +}; |
| 218 | + |
| 219 | +&flash0 { |
| 220 | + partitions { |
| 221 | + compatible = "fixed-partitions"; |
| 222 | + #address-cells = <1>; |
| 223 | + #size-cells = <1>; |
| 224 | + |
| 225 | + /* Reserve 48 KiB for the bootloader */ |
| 226 | + boot_partition: partition@0 { |
| 227 | + reg = <0x00000000 DT_SIZE_K(48)>; |
| 228 | + label = "mcuboot"; |
| 229 | + read-only; |
| 230 | + }; |
| 231 | + |
| 232 | + /* Reserve 224 KiB for the application in slot 0 */ |
| 233 | + slot0_partition: partition@c000 { |
| 234 | + reg = <0x0000c000 DT_SIZE_K(224)>; |
| 235 | + label = "image-0"; |
| 236 | + }; |
| 237 | + |
| 238 | + /* Reserve 224 KiB for the application in slot 1 */ |
| 239 | + slot1_partition: partition@44000 { |
| 240 | + reg = <0x00044000 DT_SIZE_K(224)>; |
| 241 | + label = "image-1"; |
| 242 | + }; |
| 243 | + |
| 244 | + /* Set 16 KiB of storage at the end of the 512 KiB of flash */ |
| 245 | + storage_partition: partition@7c000 { |
| 246 | + reg = <0x0007c000 DT_SIZE_K(16)>; |
| 247 | + label = "storage"; |
| 248 | + }; |
| 249 | + }; |
| 250 | +}; |
| 251 | + |
| 252 | +&bt_hci_silabs { |
| 253 | + status = "okay"; |
| 254 | +}; |
| 255 | + |
| 256 | +mikrobus_i2c: &i2c0 {}; |
| 257 | + |
| 258 | +mikrobus_spi: &usart0 {}; |
| 259 | + |
| 260 | +mikrobus_uart: &euart0 {}; |
| 261 | + |
| 262 | +zephyr_i2c: &i2c0 {}; |
| 263 | + |
| 264 | +zephyr_spi: &usart0 {}; |
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