boards: st: stm32n6: add xspi ext flash

Enable XSPI external Flash for STM32N6570-DK and Nucleo N657X0 boards.

Signed-off-by: Guillaume Gautier <[email protected]>

Author: gautierg-st

boards/st/nucleo_n657x0_q/doc/index.rst

@@ -91,6 +91,17 @@ Default Zephyr Peripheral Mapping:
 - USART_1_RX : PE6
 - USART_3_TX : PD8
 - USART_3_RX : PD9
+- XSPI2_NCS1 : PN1
+- XSPI2_DQS0 : PN0
+- XSPI2_CLK : PN6
+- XSPI2_IO0 : PN2
+- XSPI2_IO1 : PN3
+- XSPI2_IO2 : PN4
+- XSPI2_IO3 : PN5
+- XSPI2_IO4 : PN8
+- XSPI2_IO5 : PN9
+- XSPI2_IO6 : PN10
+- XSPI2_IO7 : PN11
 
 System Clock
 ------------

boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi

@@ -6,6 +6,7 @@
 
 #include <st/n6/stm32n657X0.dtsi>
 #include <st/n6/stm32n657x0hxq-pinctrl.dtsi>
+#include <zephyr/dt-bindings/flash_controller/xspi.h>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 #include "arduino_r3_connector.dtsi"
 
@@ -15,6 +16,7 @@
 		zephyr,shell-uart = &usart1;
 		zephyr,sram = &axisram2;
 		zephyr,canbus = &fdcan1;
+		spi-flash0 = &mx25um51245g;
 	};
 
 	leds: leds {
@@ -199,3 +201,33 @@
 		status = "okay";
 	};
 };
+
+&xspi2 {
+	pinctrl-0 = <&xspim_p2_ncs1_pn1 &xspim_p2_dqs0_pn0 &xspim_p2_clk_pn6
+		     &xspim_p2_io0_pn2 &xspim_p2_io1_pn3 &xspim_p2_io2_pn4
+		     &xspim_p2_io3_pn5 &xspim_p2_io4_pn8 &xspim_p2_io5_pn9
+		     &xspim_p2_io6_pn10 &xspim_p2_io7_pn11>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	mx25um51245g: ospi-nor-flash@70000000 {
+		compatible = "st,stm32-xspi-nor";
+		reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
+		ospi-max-frequency = <DT_FREQ_M(200)>;
+		spi-bus-width = <XSPI_OCTO_MODE>;
+		data-rate = <XSPI_DTR_TRANSFER>;
+		four-byte-opcodes;
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			storage_partition: partition@3ff0000 {
+				label = "storage";
+				reg = <0x3ff0000 DT_SIZE_K(64)>;
+			};
+		};
+	};
+};

boards/st/stm32n6570_dk/doc/index.rst

@@ -95,6 +95,17 @@ Default Zephyr Peripheral Mapping:
 - USART_1_RX : PE6
 - USART_2_TX : PD5
 - USART_2_RX : PF6
+- XSPI2_NCS1 : PN1
+- XSPI2_DQS0 : PN0
+- XSPI2_CLK : PN6
+- XSPI2_IO0 : PN2
+- XSPI2_IO1 : PN3
+- XSPI2_IO2 : PN4
+- XSPI2_IO3 : PN5
+- XSPI2_IO4 : PN8
+- XSPI2_IO5 : PN9
+- XSPI2_IO6 : PN10
+- XSPI2_IO7 : PN11
 
 System Clock
 ------------

boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi

@@ -6,15 +6,17 @@
 
 #include <st/n6/stm32n657X0.dtsi>
 #include <st/n6/stm32n657x0hxq-pinctrl.dtsi>
-#include "arduino_r3_connector.dtsi"
+#include <zephyr/dt-bindings/flash_controller/xspi.h>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
+#include "arduino_r3_connector.dtsi"
 
 / {
 	chosen {
 		zephyr,console = &usart1;
 		zephyr,shell-uart = &usart1;
 		zephyr,sram = &axisram2;
 		zephyr,canbus = &fdcan1;
+		spi-flash0 = &mx66uw1g45g;
 	};
 
 	aliases {
@@ -156,3 +158,33 @@
 	current-speed = <115200>;
 	status = "okay";
 };
+
+&xspi2 {
+	pinctrl-0 = <&xspim_p2_ncs1_pn1 &xspim_p2_dqs0_pn0 &xspim_p2_clk_pn6
+		     &xspim_p2_io0_pn2 &xspim_p2_io1_pn3 &xspim_p2_io2_pn4
+		     &xspim_p2_io3_pn5 &xspim_p2_io4_pn8 &xspim_p2_io5_pn9
+		     &xspim_p2_io6_pn10 &xspim_p2_io7_pn11>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	mx66uw1g45g: ospi-nor-flash@70000000 {
+		compatible = "st,stm32-xspi-nor";
+		reg = <0x70000000 DT_SIZE_M(128)>; /* 1 Gbits */
+		ospi-max-frequency = <DT_FREQ_M(200)>;
+		spi-bus-width = <XSPI_OCTO_MODE>;
+		data-rate = <XSPI_DTR_TRANSFER>;
+		four-byte-opcodes;
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			storage_partition: partition@7ff0000 {
+				label = "storage";
+				reg = <0x7ff0000 DT_SIZE_K(64)>;
+			};
+		};
+	};
+};