soc: wch: add the CH32V00x series

Compared to the CH32V003, the CH32V00x series is an evolution that
uses a different microarchitecture (V2C instead of V2A) and different
pinctrl mappings.

Fork the current qingke_v2a and use the new proposed naming convention.

Signed-off-by: Michael Hope <[email protected]>

Author: nzmichaelh

soc/wch/ch32v/ch32v00x/CMakeLists.txt

@@ -0,0 +1,10 @@
+# Copyright (c) 2024 Michael Hope
+# Copyright (c) 2024 Jianxiong Gu
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources(
+  soc_irq.S
+  vector.S
+)
+
+zephyr_include_directories(.)

soc/wch/ch32v/ch32v00x/Kconfig

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Michael Hope <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_CH32V00X
+	select RISCV_ISA_RV32E
+	select RISCV_ISA_EXT_ZICSR
+	select RISCV_ISA_EXT_ZIFENCEI
+	select RISCV_ISA_EXT_C
+	select RISCV_ISA_EXT_ZMMUL

soc/wch/ch32v/ch32v00x/Kconfig.defconfig

@@ -0,0 +1,14 @@
+# Copyright (c) 2025 Michael Hope <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_CH32V00X
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
+
+config CLOCK_CONTROL
+	default y
+
+rsource "Kconfig.defconfig.*"
+
+endif # SOC_SERIES_CH32V00X

soc/wch/ch32v/ch32v00x/Kconfig.defconfig.ch32v006

@@ -0,0 +1,12 @@
+# Copyright (c) 2025 Michael Hope <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_CH32V00X
+
+config VECTOR_TABLE_SIZE
+	default 41
+
+config NUM_IRQS
+	default 41
+
+endif # SOC_SERIES_CH32V00X

soc/wch/ch32v/ch32v00x/Kconfig.soc

@@ -0,0 +1,11 @@
+# Copyright (c) 2025 Michael Hope <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_CH32V00X
+	bool
+	select SOC_FAMILY_CH32V
+
+config SOC_SERIES
+	default "ch32v00x" if SOC_SERIES_CH32V00X
+
+rsource "Kconfig.soc.*"

soc/wch/ch32v/ch32v00x/Kconfig.soc.ch32v006

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Michael Hope <[email protected]>
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_CH32V006
+	bool
+	select SOC_SERIES_CH32V00X
+
+config SOC
+	default "ch32v006" if SOC_CH32V006

soc/wch/ch32v/ch32v00x/pinctrl_soc.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2024 Michael Hope
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __PINCTRL_SOC_H__
+#define __PINCTRL_SOC_H__
+
+/**
+ * @brief Type to hold a pin's pinctrl configuration.
+ */
+struct ch32v00x_pinctrl_soc_pin {
+	uint32_t config: 22;
+	bool bias_pull_up: 1;
+	bool bias_pull_down: 1;
+	bool drive_open_drain: 1;
+	bool drive_push_pull: 1;
+	bool output_high: 1;
+	bool output_low: 1;
+	uint8_t slew_rate: 2;
+};
+
+typedef struct ch32v00x_pinctrl_soc_pin pinctrl_soc_pin_t;
+
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)                                               \
+	{                                                                                          \
+		.config = DT_PROP_BY_IDX(node_id, prop, idx),                                      \
+		.bias_pull_up = DT_PROP(node_id, bias_pull_up),                                    \
+		.bias_pull_down = DT_PROP(node_id, bias_pull_down),                                \
+		.drive_open_drain = DT_PROP(node_id, drive_open_drain),                            \
+		.drive_push_pull = DT_PROP(node_id, drive_push_pull),                              \
+		.output_high = DT_PROP(node_id, output_high),                                      \
+		.output_low = DT_PROP(node_id, output_low),                                        \
+		.slew_rate = DT_ENUM_IDX(node_id, slew_rate),                                      \
+	},
+
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)                                                   \
+	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), DT_FOREACH_PROP_ELEM, pinmux,           \
+				Z_PINCTRL_STATE_PIN_INIT)}
+
+#endif

soc/wch/ch32v/ch32v00x/soc_irq.S

@@ -0,0 +1,20 @@
+/*
+ * Copyright (c) 2024 Michael Hope
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <offsets.h>
+#include <zephyr/toolchain.h>
+
+/* Exports */
+GTEXT(__soc_is_irq)
+GTEXT(__soc_handle_irq)
+
+SECTION_FUNC(exception.other, __soc_is_irq)
+	csrr a0, mcause
+	srli a0, a0, 31
+	ret
+
+SECTION_FUNC(exception.other, __soc_handle_irq)
+	ret

soc/wch/ch32v/ch32v00x/vector.S

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2024 Michael Hope
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/toolchain.h>
+
+#ifndef CONFIG_VECTOR_TABLE_SIZE
+#error "VECTOR_TABLE_SIZE must be defined"
+#endif
+
+/* Exports */
+GTEXT(__start)
+
+/* Imports */
+GTEXT(__initialize)
+
+SECTION_FUNC(vectors, ivt)
+	.option norvc
+	j       __start
+	.rept   CONFIG_VECTOR_TABLE_SIZE
+	.word	_isr_wrapper
+	.endr
+
+SECTION_FUNC(vectors, __start)
+	li 	a0, 3
+	csrw	mtvec, a0
+	j	__initialize

soc/wch/ch32v/soc.yml

@@ -7,6 +7,9 @@ family:
   - name: qingke-v2a
     socs:
     - name: ch32v003
+  - name: ch32v00x
+    socs:
+    - name: ch32v006
   - name: qingke-v4c
     socs:
     - name: ch32v208