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boards: riscv: tlsr9518adk80d: new Telink B91 board support
New Telink RISC-V B91 Generic Starter Kit board support. Signed-off-by: Yuriy Vynnychek <[email protected]>
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‎boards/riscv/tlsr9518adk80d/Kconfig.board‎

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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_TLSR9518ADK80D
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bool "Telink B91 Platform"
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depends on SOC_RISCV_TELINK_B91

‎boards/riscv/tlsr9518adk80d/Kconfig.defconfig‎

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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_TLSR9518ADK80D
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config BOARD
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default "tlsr9518adk80d"
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config COMPRESSED_ISA
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default y
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config GPIO_TELINK_B91
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default y if GPIO
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config UART_TELINK_B91
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default y if SERIAL
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config PINMUX_TELINK_B91
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default y if PINMUX
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endif

‎boards/riscv/tlsr9518adk80d/doc/img/tlsr9518_block_diagram.jpg‎

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‎boards/riscv/tlsr9518adk80d/doc/img/tlsr9518adk80d.jpg‎

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‎boards/riscv/tlsr9518adk80d/doc/index.rst‎

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.. _tlst9518adk80d:
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Telink TLSR9518ADK80D
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#####################
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Overview
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********
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The TLSR9518A Generic Starter Kit is a hardware platform which
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can be used to verify the `Telink TLSR9 series chipset`_ and develop applications
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for several 2.4 GHz air interface standards including Bluetooth 5.2 (Basic data
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rate, Enhanced data rate, LE, Indoor positioning and BLE Mesh),
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Zigbee 3.0, Homekit, 6LoWPAN, Thread and 2.4 Ghz proprietary.
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.. figure:: img/tlsr9518adk80d.jpg
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:width: 400px
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:align: center
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:alt: TLSR9518ADK80D
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More information about the board can be found at the `Telink B91 Generic Starter Kit Hardware Guide`_ website.
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Hardware
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********
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The TLSR9518A SoC integrates a powerful 32-bit RISC-V MCU, DSP, AI Engine, 2.4 GHz ISM Radio, 256
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KB SRAM (128 KB of Data Local Memory and 128 KB of Instruction Local Memory), external Flash memory,
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stereo audio codec, 14 bit AUX ADC, analog and digital Microphone input, PWM, flexible IO interfaces,
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and other peripheral blocks required for advanced IoT, hearable, and wearable devices.
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.. figure:: img/tlsr9518_block_diagram.jpg
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:width: 400px
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:align: center
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:alt: TLSR9518ADK80D_SOC
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The TLSR9518ADK80D default board configuration provides the following hardware components:
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- RF conducted antenna
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- 1 MB External Flash memory with reset button
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- Chip reset button
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- Mini USB interface
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- 4-wire JTAG
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- 4 LEDs, Key matrix up to 4 keys
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- 2 line-in function (Dual Analog microphone supported when switching jumper from microphone path)
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- Dual Digital microphone
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- Stereo line-out
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Supported Features
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==================
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The Zephyr TLSR9518ADK80D board configuration supports the following hardware features:
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+----------------+------------+------------------------------+
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| Interface | Controller | Driver/Component |
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+================+============+==============================+
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| PLIC | on-chip | interrupt_controller |
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+----------------+------------+------------------------------+
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| RISC-V Machine | on-chip | timer |
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| Timer (32 KHz) | | |
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+----------------+------------+------------------------------+
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| PINMUX | on-chip | pinmux |
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+----------------+------------+------------------------------+
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| GPIO | on-chip | gpio |
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+----------------+------------+------------------------------+
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| UART | on-chip | serial |
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+----------------+------------+------------------------------+
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The following example projects are supported:
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- samples/hello_world
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- samples/synchronization
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- samples/philosophers
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- samples/basic/threads
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- samples/basic/blinky
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- samples/basic/button
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- samples/subsys/console/echo
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- samples/subsys/console/getchar
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- samples/subsys/console/getline
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- samples/subsys/shell/shell_module
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- samples/subsys/cpp/cpp_synchronization
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.. note::
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To support "button" example project PC3-KEY3 (J20-19, J20-20) jumper needs to be removed and KEY3 (J20-19) should be connected to VDD3_DCDC (J51-13) externally.
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For the rest example projects use the default jumpers configuration.
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Other hardware features and example projects are not supported yet.
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Limitations
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-----------
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- Maximum 3 GPIO pins could be configured to generate interrupts simultaneously. All pins must be related to different ports and use different IRQ numbers.
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- DMA mode is not supported by Serial Port.
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- UART hardware flow control is not implemented.
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Default configuration and IOs
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=============================
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System Clock
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------------
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The TLSR9518ADK80D board is configured to use the 24 MHz external crystal oscillator
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with the on-chip PLL/DIV generating the 48 MHz system clock.
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The following values also could be assigned to the system clock in the board DTS file
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(``boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts``):
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- 16000000
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- 24000000
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- 32000000
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- 48000000
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- 64000000
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- 96000000
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.. code-block::
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&cpu0 {
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clock-frequency = <48000000>;
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};
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PINs Configuration
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------------------
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The TLSR9518A SoC has five GPIO controllers (PORT_A to PORT_E), but only two are
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currently enabled (PORT_B for LEDs control and PORT_C for buttons) in the board DTS file:
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- LED0 (blue): PB4, LED1 (green): PB5, LED2 (white): PB6, LED3 (red): PB7
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- Key Matrix SW0: PC2_PC3, SW1: PC2_PC1, SW2: PC0_PC3, SW3: PC0_PC1
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Peripheral's pins on the SoC are mapped to the following GPIO pins in the
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``boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts`` file:
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- UART0 RX: PB2, TX: PB3
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- UART1 RX: PC6, TX: PC7
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Serial Port
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-----------
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The TLSR9518A SoC has 2 UARTs. The Zephyr console output is assigned
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to UART0 in the ``boards/riscv/tlsr9518adk80d/tlsr9518adk80d_defconfig`` file.
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The default settings are 115200 8N1.
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Programming and debugging
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*************************
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Building
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========
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You can build applications in the usual way. Here is an example for
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the "hello_world" application.
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.. code-block:: console
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# From the root of the zephyr repository
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west build -b tlsr9518adk80d samples/hello_world
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To use `Telink RISC-V Linux Toolchain`_, ``ZEPHYR_TOOLCHAIN_VARIANT`` and ``CROSS_COMPILE`` variables need to be set.
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.. code-block:: console
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# Set Zephyr toolchain variant to cross-compile
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export ZEPHYR_TOOLCHAIN_VARIANT=cross-compile
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# Specify the Telink RISC-V Toolchain location
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export CROSS_COMPILE=~/toolchains/nds32le-elf-mculib-v5f/bin/riscv32-elf-
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# From the root of the zephyr repository
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west build -b tlsr9518adk80d samples/hello_world
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`Telink RISC-V Linux Toolchain`_ is available on the `Burning and Debugging Tools for TLSR9 Series in Linux`_ page.
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Open a serial terminal with the following settings:
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Flash the board, reset and observe the following messages on the selected
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serial port:
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.. code-block:: console
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*** Booting Zephyr OS version 2.5.0 ***
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Hello World! tlsr9518adk80d
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Flashing
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========
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In order to flash the TLSR9518ADK80D board check the following resources:
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- `Burning and Debugging Tools for all Series`_
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- `Burning and Debugging Tools for TLSR9 Series`_
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- `Burning and Debugging Tools for TLSR9 Series in Linux`_
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Debugging
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=========
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Supporting UART debug and OpenOCD+GDB.
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References
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**********
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.. target-notes::
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.. _Telink TLSR9 series chipset: http://wiki.telink-semi.cn/wiki/chip-series/TLSR9-Series/
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.. _Telink B91 Generic Starter Kit Hardware Guide: http://wiki.telink-semi.cn/wiki/Hardware/B91_Generic_Starter_Kit_Hardware_Guide/
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.. _Telink RISC-V Linux Toolchain: http://wiki.telink-semi.cn/tools_and_sdk/Tools/IDE/telink_riscv_linux_toolchain.zip
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.. _Burning and Debugging Tools for all Series: http://wiki.telink-semi.cn/wiki/IDE-and-Tools/Burning-and-Debugging-Tools-for-all-Series/
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.. _Burning and Debugging Tools for TLSR9 Series: http://wiki.telink-semi.cn/wiki/IDE-and-Tools/Burning-and-Debugging-Tools-for-TLSR9-Series/
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.. _Burning and Debugging Tools for TLSR9 Series in Linux: http://wiki.telink-semi.cn/wiki/IDE-and-Tools/BDT_for_TLSR9_Series_in_Linux/

‎boards/riscv/tlsr9518adk80d/tlsr9518adk80d.dts‎

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/*
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* Copyright (c) 2021 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <telink_b91.dtsi>
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/ {
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model = "telink,b91";
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compatible = "telink,tlsr9518adk80d";
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aliases {
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led0 = &led_blue;
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led1 = &led_green;
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sw0 = &key_1;
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};
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leds {
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compatible = "gpio-leds";
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led_blue: led_0 {
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gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
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label = "LED Blue";
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};
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led_green: led_1 {
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gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
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label = "LED Green";
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};
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led_white: led_2 {
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gpios = <&gpiob 6 GPIO_ACTIVE_HIGH>;
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label = "LED White";
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};
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led_red: led_3 {
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gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
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label = "LED Red";
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};
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};
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keys {
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compatible = "gpio-keys";
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key_1: button_1 {
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label = "User KEY1";
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gpios = <&gpioc 2 GPIO_PULL_DOWN>;
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};
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};
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &ram_dlm;
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zephyr,flash = &flash;
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zephyr,flash-controller = &flash_mspi;
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};
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};
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&cpu0 {
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clock-frequency = <48000000>;
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};
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&ram_ilm {
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reg = <0x00000000 0x00020000>;
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};
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&ram_dlm {
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reg = <0x00080000 0x00020000>;
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};
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&flash {
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reg = <0x20000000 0x100000>;
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};
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&gpiob {
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status = "okay";
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};
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&gpioc {
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interrupts = <25 1>;
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status = "okay";
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};
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&pinmux {
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status = "okay";
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pad-mul-sel = <1>;
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};
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&uart0 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_tx_pb2 &uart0_rx_pb3>;
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};
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&flash_mspi {
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "mcuboot";
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reg = <0x00000000 0x8000>;
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};
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slot0_partition: partition@8000 {
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label = "image-0";
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reg = <0x00008000 0x1a000>;
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};
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slot1_partition: partition@22000 {
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label = "image-1";
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reg = <0x00022000 0x1a000>;
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};
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scratch_partition: partition@3c000 {
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label = "image-scratch";
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reg = <0x0003c000 0x2000>;
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};
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storage_partition: partition@f0000 {
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label = "storage";
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reg = <0x000f0000 0x00010000>;
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};
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};
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};

‎boards/riscv/tlsr9518adk80d/tlsr9518adk80d.yaml‎

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identifier: tlsr9518adk80d
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name: Telink TLSR9518ADK80D
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type: mcu
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arch: riscv32
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toolchain:
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- cross-compile
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- zephyr
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ram: 128
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flash: 1024
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supported:
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- gpio

‎boards/riscv/tlsr9518adk80d/tlsr9518adk80d_defconfig‎

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# Copyright (c) 2021 Telink Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_RISCV_TELINK_B91=y
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CONFIG_SOC_RISCV_TELINK_B91=y
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CONFIG_BOARD_TLSR9518ADK80D=y
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CONFIG_PLIC=y
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CONFIG_RISCV_MACHINE_TIMER=y
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CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
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CONFIG_PINMUX=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_SERIAL=y
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# HW DSP options
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CONFIG_TELINK_B91_HWDSP=n

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