dts: arm: nxp: nxp_imx8m_m4: Add ECSPI devices

Add device tree instances for ECSPI devices,
update SoC code to enable clocks.

Signed-off-by: Peter Fecher <[email protected]>

Author: pefech

dts/arm/nxp/nxp_imx8m_m4.dtsi

@@ -136,6 +136,36 @@
 			#clock-cells = <3>;
 		};
 
+		ecspi1: spi@30820000 {
+			compatible = "nxp,imx-ecspi";
+			reg = <0x30820000 DT_SIZE_K(64)>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <31 3>;
+			clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
+			status = "disabled";
+		};
+
+		ecspi2: spi@30830000 {
+			compatible = "nxp,imx-ecspi";
+			reg = <0x30830000 DT_SIZE_K(64)>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <32 3>;
+			clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
+			status = "disabled";
+		};
+
+		ecspi3: spi@30840000 {
+			compatible = "nxp,imx-ecspi";
+			reg = <0x30840000 DT_SIZE_K(64)>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <33 3>;
+			clocks = <&ccm IMX_CCM_ECSPI3_CLK 0 0>;
+			status = "disabled";
+		};
+
 		uart1: uart@30860000 {
 			compatible = "nxp,imx-iuart";
 			reg = <0x30860000 0x10000>;

soc/nxp/imx/imx8m/m4_mini/soc.c

@@ -128,6 +128,29 @@ static void SOC_ClockInit(void)
 	/* Set root clock to 80MHZ/ 1= 80MHZ */
 	CLOCK_SetRootDivider(kCLOCK_RootUart4, 1U, 1U);
 #endif
+#endif
+
+#if defined(CONFIG_SPI_MCUX_ECSPI)
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi1), okay)
+	/* Set ECSPI1 source to SYSTEM PLL1 800MHZ */
+	CLOCK_SetRootMux(kCLOCK_RootEcspi1, kCLOCK_EcspiRootmuxSysPll1);
+	/* Set root clock to 800MHZ / 10 = 80MHZ */
+	CLOCK_SetRootDivider(kCLOCK_RootEcspi1, 2U, 5U);
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi2), okay)
+	/* Set ECSPI2 source to SYSTEM PLL1 800MHZ */
+	CLOCK_SetRootMux(kCLOCK_RootEcspi2, kCLOCK_EcspiRootmuxSysPll1);
+	/* Set root clock to 800MHZ / 10 = 80MHZ */
+	CLOCK_SetRootDivider(kCLOCK_RootEcspi2, 2U, 5U);
+#endif
+
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(ecspi3), okay)
+	/* Set ECSPI3 source to SYSTEM PLL1 800MHZ */
+	CLOCK_SetRootMux(kCLOCK_RootEcspi3, kCLOCK_EcspiRootmuxSysPll1);
+	/* Set root clock to 800MHZ / 10 = 80MHZ */
+	CLOCK_SetRootDivider(kCLOCK_RootEcspi3, 2U, 5U);
+#endif
 #endif
 
 	/* Enable RDC clock */