dt: mimxrt798s/cm33_cpu0: Instantiate nxp,rtxxx-dsp-ctrl

Instantiate the nxp,rtxxx-dsp-ctl
driver (nxp,rt700-dsp-ctrl-hifi4 variant) in the mimxrt798s/cm33_cpu0's
DT. Enable it in mimxrt700_evk/mimxrt798s/cm33_cpu0.

Signed-off-by: Vit Stanicek <[email protected]>

Author: VitekST

boards/nxp/mimxrt700_evk/mimxrt700_evk_mimxrt798s_cm33_cpu0.dts

@@ -275,3 +275,7 @@ p3t1755dp_ard_i2c_interface: &flexcomm8_lpi2c8 {};
 &rtc0 {
 	status = "okay";
 };
+
+&dsp {
+	status = "okay";
+};

dts/arm/nxp/nxp_rt7xx_cm33_cpu0.dtsi

@@ -12,6 +12,7 @@
 #include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>
 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
+#include <zephyr/dt-bindings/misc/nxp_rtxxx_dsp_ctrl.h>
 
 / {
 	cpus {
@@ -31,6 +32,34 @@
 		};
 	};
 
+	dsp: dsp {
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		compatible = "nxp,rt700-dsp-ctrl-hifi4";
+		sysctl = <&syscon0>;
+
+		status = "disabled";
+
+		/* 1st 1 kiB of HiFi4's ITCM */
+		region@24020000 {
+			reg = <0x24020000 DT_SIZE_K(1)>;
+			type = <NXP_RTXXX_DSP_REGION_RESET>;
+		};
+
+		/* 1st half of reserved HiFi4 SRAM region (see below) */
+		region@200000 {
+			reg = <0x200000 DT_SIZE_M(1)>;
+			type = <NXP_RTXXX_DSP_REGION_TEXT>;
+		};
+
+		/* 2nd half of reserved HiFi4 SRAM region (see below) */
+		region@300000 {
+			reg = <0x300000 DT_SIZE_M(1)>;
+			type = <NXP_RTXXX_DSP_REGION_DATA>;
+		};
+	};
+
 	soc {
 		sram: sram@10000000 {
 			ranges = <0x0 0x10000000 0x780000