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dts: Add MAX32666 DMA nodes and bindings
Insert dma0 in MAX32666 devicetree and add devicetree bindings for MAX32 DMA driver. Signed-off-by: Mert Ekren <[email protected]>
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dts/arm/adi/max32/max32666.dtsi

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};
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};
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dma0: dma@40028000 {
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compatible = "adi,max32-dma";
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reg = <0x40028000 0x1000>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS0 5>;
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interrupts = <28 0>, <29 0>, <30 0>, <31 0>, <68 0>, <69 0>, <70 0>, <71 0>;
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dma-channels = <8>;
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status = "disabled";
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#dma-cells = <2>;
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};
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dma1: dma@40035000 {
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compatible = "adi,max32-dma";
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reg = <0x40035000 0x1000>;
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clocks = <&gcr ADI_MAX32_CLOCK_BUS1 21>;
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interrupts = <72 0>, <73 0>, <74 0>, <75 0>, <76 0>, <77 0>, <78 0>, <79 0>;
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dma-channels = <8>;
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status = "disabled";
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#dma-cells = <2>;
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};
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spi0: spi@400be000 {
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compatible = "adi,max32-spi";
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reg = <0x400be000 0x1000>;
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/*
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* Copyright (c) 2023 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32666_DMA_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32666_DMA_H_
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#define MAX32_DMA_SLOT_MEMTOMEM 0x00U
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#define MAX32_DMA_SLOT_SPI1_RX 0x01U
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#define MAX32_DMA_SLOT_SPI2_RX 0x02U
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#define MAX32_DMA_SLOT_UART0_RX 0x04U
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#define MAX32_DMA_SLOT_UART1_RX 0x05U
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#define MAX32_DMA_SLOT_I2C0_RX 0x07U
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#define MAX32_DMA_SLOT_I2C1_RX 0x08U
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#define MAX32_DMA_SLOT_ADC 0x09U
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#define MAX32_DMA_SLOT_I2C2_RX 0x0AU
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#define MAX32_DMA_SLOT_UART2_RX 0x0EU
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#define MAX32_DMA_SLOT_SPI0_RX 0x0FU
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#define MAX32_DMA_SLOT_SPI1_TX 0x21U
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#define MAX32_DMA_SLOT_SPI2_TX 0x21U
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#define MAX32_DMA_SLOT_UART0_TX 0x24U
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#define MAX32_DMA_SLOT_UART1_TX 0x25U
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#define MAX32_DMA_SLOT_I2C0_TX 0x27U
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#define MAX32_DMA_SLOT_I2C1_TX 0x28U
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#define MAX32_DMA_SLOT_I2C2_TX 0x2AU
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#define MAX32_DMA_SLOT_UART2_TX 0x2EU
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#define MAX32_DMA_SLOT_SPI0_TX 0x2FU
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32666_DMA_H_ */

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