@@ -388,9 +388,8 @@ static inline void dwc2_apply_fifo_config(const struct device *dev)
388388 dwc2_hal_flush_tx_fifo (dwc2 , 0x10UL );
389389 dwc2_hal_flush_rx_fifo (dwc2 );
390390
391- LOG_DBG ("FIFO configuration applied" );
392- LOG_DBG ("\tnptx=%u, rx=%u, ptx=%u" , priv -> fifo_nptxfsiz * 4 , priv -> fifo_rxfsiz * 4 ,
393- priv -> fifo_ptxfsiz * 4 );
391+ LOG_DBG ("FIFO configuration applied nptx=%u, rx=%u, ptx=%u" ,
392+ priv -> fifo_nptxfsiz * 4 , priv -> fifo_rxfsiz * 4 , priv -> fifo_ptxfsiz * 4 );
394393}
395394
396395/*
@@ -414,22 +413,6 @@ static inline void dwc2_apply_fifo_config(const struct device *dev)
414413#define PORT_EVENTS_INTRS_MSK \
415414 (USB_DWC2_HPRT_PRTCONNDET | USB_DWC2_HPRT_PRTENCHNG | USB_DWC2_HPRT_PRTOVRCURRCHNG)
416415
417- static inline int uhc_dwc2_get_port_speed (const struct device * dev , enum uhc_dwc2_speed * speed )
418- {
419- const struct uhc_dwc2_config * const config = dev -> config ;
420- struct uhc_dwc2_data * priv = uhc_get_private (dev );
421- struct usb_dwc2_reg * const dwc2 = config -> base ;
422-
423- if (priv -> port_state != UHC_PORT_STATE_ENABLED ) {
424- LOG_ERR ("Port is not enabled, cannot get speed" );
425- return - ENODEV ;
426- }
427-
428- * speed = dwc2_hal_get_port_speed (dwc2 );
429-
430- return 0 ;
431- }
432-
433416static void uhc_dwc2_debounce_enable (const struct device * dev )
434417{
435418 const struct uhc_dwc2_config * const config = dev -> config ;
@@ -830,13 +813,15 @@ static void uhc_dwc2_isr_chan_handler(const struct device *dev, struct uhc_dwc2_
830813 LOG_ERR ("Channel %d error: 0x%08x" , chan -> chan_idx , hcint );
831814 /* TODO: Store the error in hal context */
832815 atomic_set_bit (& chan -> event , DWC2_CHAN_EVENT_ERROR );
816+
833817 } else if (hcint & USB_DWC2_HCINT_CHHLTD ) {
834818 if (chan -> halt_requested ) {
835819 chan -> halt_requested = 0 ;
836820 atomic_set_bit (& chan -> event , DWC2_CHAN_EVENT_HALT_REQ );
837821 } else {
838822 atomic_set_bit (& chan -> event , DWC2_CHAN_EVENT_CPLT );
839823 }
824+
840825 } else if (hcint & USB_DWC2_HCINT_XFERCOMPL ) {
841826 /* Note:
842827 * The channel isn't halted yet, so we need to halt it manually to stop the
@@ -881,7 +866,7 @@ static void uhc_dwc2_isr_handler(const struct device *dev)
881866 if (core_intrs & USB_DWC2_GINTSTS_PRTINT ) {
882867 port_intrs = sys_read32 ((mem_addr_t )& dwc2 -> hprt );
883868 /* Clear the interrupt status by writing 1 to the W1C bits, except the PRTENA bit */
884- sys_write32 (port_intrs & ( ~USB_DWC2_HPRT_PRTENA ) , (mem_addr_t )& dwc2 -> hprt );
869+ sys_write32 (port_intrs & ~USB_DWC2_HPRT_PRTENA , (mem_addr_t )& dwc2 -> hprt );
885870 }
886871
887872 if (core_intrs & USB_DWC2_GINTSTS_DISCONNINT ) {
@@ -1174,6 +1159,8 @@ static void uhc_dwc2_chan_deinit(const struct device *dev, struct uhc_dwc2_chan
11741159static inline void uhc_dwc2_handle_port_events (const struct device * dev , uint32_t events )
11751160{
11761161 struct uhc_dwc2_data * priv = uhc_get_private (dev );
1162+ const struct uhc_dwc2_config * const config = dev -> config ;
1163+ struct usb_dwc2_reg * const dwc2 = config -> base ;
11771164 enum uhc_dwc2_speed port_speed ;
11781165 bool port_has_device ;
11791166 int ret ;
@@ -1198,12 +1185,7 @@ static inline void uhc_dwc2_handle_port_events(const struct device *dev, uint32_
11981185 dwc2_port_enable (dev );
11991186
12001187 priv -> port_state = UHC_PORT_STATE_ENABLED ;
1201-
1202- ret = uhc_dwc2_get_port_speed (dev , & port_speed );
1203- if (ret ) {
1204- LOG_ERR ("Failed to get port speed" );
1205- return ;
1206- }
1188+ port_speed = dwc2_hal_get_port_speed (dwc2 );
12071189
12081190 ret = uhc_dwc2_chan_config (dev , 0 , 0 , 0 , UHC_DWC2_SPEED_FULL , port_speed ,
12091191 UHC_DWC2_XFER_TYPE_CTRL );
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