drivers: mspi: mspi_dw: Add support for nrf-mspi peripheral

The nrf-mspi peripheral is similar to EXMIF on nrf54h20
but supports DMA and slave-mode. The wrapper around
the SSI IP is also different with DMA features.

Signed-off-by: David Jewsbury <[email protected]>

Author: Hi-Im-David

drivers/mspi/Kconfig.dw

@@ -7,7 +7,6 @@ config MSPI_DW
 	default y
 	depends on DT_HAS_SNPS_DESIGNWARE_SSI_ENABLED
 	select PINCTRL if $(dt_compat_any_has_prop,$(DT_COMPAT_SNPS_DESIGNWARE_SSI),pinctrl-0)
-	imply MSPI_XIP
 	imply MSPI_TIMING
 
 if MSPI_DW

drivers/mspi/mspi_dw_vendor_specific.h

@@ -97,7 +97,223 @@ static inline int vendor_specific_xip_disable(const struct device *dev,
 }
 #endif /* defined(CONFIG_MSPI_XIP) */
 
-#else
+#elif DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_mspi)
+#define MSPI_DT_DRV_COMPAT nordic_nrf_mspi
+#include <nrf.h>
+
+static inline void vendor_specific_init(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	preg->EVENTS_CORE = 0;
+	preg->EVENTS_DMA.DONE = 0;
+
+	preg->INTENSET = BIT(QSPI_INTENSET_CORE_Pos)
+		       | BIT(QSPI_INTENSET_DMADONE_Pos);
+}
+
+static inline void vendor_specific_suspend(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	preg->ENABLE = 0;
+}
+
+static inline void vendor_specific_resume(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	preg->ENABLE = 1;
+
+}
+
+static inline void vendor_specific_irq_clear(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	preg->EVENTS_CORE = 0;
+	preg->EVENTS_DMA.DONE = 0;
+}
+
+/* DMA support */
+
+#define EVDMA_ATTR_LEN_Pos (0UL)
+#define EVDMA_ATTR_LEN_Msk (0x00FFFFFFUL)
+
+#define EVDMA_ATTR_ATTR_Pos (24UL)
+#define EVDMA_ATTR_ATTR_Msk (0x3FUL << EVDMA_ATTR_ATTR_Pos)
+
+#define EVDMA_ATTR_32AXI_Pos (30UL)
+#define EVDMA_ATTR_32AXI_Msk (0x1UL << EVDMA_ATTR_32AXI_Pos)
+
+#define EVDMA_ATTR_EVENTS_Pos (31UL)
+#define EVDMA_ATTR_EVENTS_Msk (0x1UL << EVDMA_ATTR_EVENTS_Pos)
+
+typedef enum {
+	EVDMA_BYTE_SWAP = 0,
+	EVDMA_JOBLIST = 1,
+	EVDMA_BUFFER_FILL = 2,
+	EVDMA_FIXED_ATTR = 3,
+	EVDMA_STATIC_ADDR = 4,
+	EVDMA_PLAIN_DATA_BUF_WR = 5,
+} EVDMA_ATTR_Type;
+
+/* Setup EVDMA attribute with the following configuratrion */
+#define EVDMA_ATTRIBUTE (BIT(EVDMA_BYTE_SWAP)   | BIT(EVDMA_JOBLIST)    | \
+			 BIT(EVDMA_BUFFER_FILL) | BIT(EVDMA_FIXED_ATTR) | \
+			 BIT(EVDMA_STATIC_ADDR) | BIT(EVDMA_PLAIN_DATA_BUF_WR))
+
+
+typedef struct {
+	uint8_t *addr;
+	uint32_t attr;
+} EVDMA_JOB_Type;
+
+#define EVDMA_JOB(BUFFER, SIZE, ATTR) \
+	(EVDMA_JOB_Type) { .addr = (uint8_t *)BUFFER, .attr = (ATTR << EVDMA_ATTR_ATTR_Pos | SIZE) }
+#define EVDMA_NULL_JOB() \
+	(EVDMA_JOB_Type) { .addr = (uint8_t *)0, .attr = 0 }
+typedef struct {
+	EVDMA_JOB_Type *tx_job;
+	EVDMA_JOB_Type *rx_job;
+} QSPI_TRANSFER_LIST_Type;
+
+/* Number of jobs needed for transmit trasaction */
+#define MAX_NUM_JOBS 4
+/* Just support 1 trasaction for each peripheral as concurrent transactions aren't supported yet*/
+#define MAX_CONCURR_TRANSACTIONS 1
+
+/* Static allocation macros for DMA transfer lists */
+#define MSPI_DW_DMA_XFER_LIST_DEFINE(inst) \
+	static QSPI_TRANSFER_LIST_Type mspi_dw_##inst##_transfer_list; \
+	static EVDMA_JOB_Type mspi_dw_##inst##_joblist[MAX_NUM_JOBS * MAX_CONCURR_TRANSACTIONS]
+
+#define MSPI_DW_DMA_XFER_LIST_GET(inst) &mspi_dw_##inst##_transfer_list
+#define MSPI_DW_DMA_JOBLIST_GET(inst) &mspi_dw_##inst##_joblist
+
+static inline void vendor_specific_start_dma_xfer(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	preg->TASKS_START = 1;
+}
+
+/* Temporarily hard-coded as not in MDK yet */
+#define QSPI_TMOD_OFFSET (0x490UL)
+#define QSPI_TMOD_RX_ONLY (0x2)
+static inline int vendor_specific_setup_dma_xfer(const struct device *dev,
+						 const struct mspi_xfer_packet *packet,
+						 const struct mspi_xfer *xfer)
+{
+	struct mspi_dw_data *dev_data = dev->data;
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	/* Use static allocation from config */
+	QSPI_TRANSFER_LIST_Type *transfer_list = (QSPI_TRANSFER_LIST_Type *)
+						 config->dma_transfer_list;
+
+	if (!transfer_list) {
+		LOG_ERR("DMA transfer list not available");
+		return -ENODEV;
+	}
+
+	/* Get joblist from static allocation in config */
+	EVDMA_JOB_Type *joblist = (EVDMA_JOB_Type *)config->dma_joblist;
+
+	int tmod = 0;
+	int job_idx = 0;
+
+	if (packet->dir == MSPI_TX) {
+		preg->CONFIG.RXTRANSFERLENGTH = 0;
+
+		/* Setting up EVDMA joblist depending on cmd, addr and data */
+
+		/*
+		 * Command address will always have a length of 4 from the DMA's perspective,
+		 * QSPI peripheral will use length of data specified in core registers
+		 */
+		if (xfer->cmd_length > 0) {
+			joblist[job_idx++] = EVDMA_JOB(&packet->cmd, 4, EVDMA_ATTRIBUTE);
+		}
+		if (xfer->addr_length > 0) {
+			joblist[job_idx++] = EVDMA_JOB(&packet->address, 4, EVDMA_ATTRIBUTE);
+		}
+		if (packet->num_bytes > 0) {
+			joblist[job_idx++] = EVDMA_JOB(packet->data_buf, packet->num_bytes,
+						       EVDMA_ATTRIBUTE);
+		}
+		/* Always terminate with null job */
+		joblist[job_idx] = EVDMA_NULL_JOB();
+		/* tx_job should point to first valid job, or null if none */
+		if (job_idx > 0) {
+			transfer_list->tx_job = &joblist[0];
+		} else {
+			transfer_list->tx_job = &joblist[job_idx];
+		}
+
+		/* rx_job always EVDMA_NULL_JOB() for transmit */
+		transfer_list->rx_job = &joblist[job_idx];
+		tmod = 0;
+	} else {
+		preg->CONFIG.RXTRANSFERLENGTH = ((packet->num_bytes + xfer->addr_length +
+						xfer->cmd_length) >>
+						dev_data->bytes_per_frame_exp) - 1;
+		joblist[0] = EVDMA_JOB(packet->data_buf, packet->num_bytes, EVDMA_ATTRIBUTE);
+		joblist[1] = EVDMA_NULL_JOB();
+		transfer_list->tx_job = &joblist[1];
+		transfer_list->rx_job = &joblist[0];
+
+		tmod = QSPI_TMOD_RX_ONLY;
+	}
+
+	/*
+	 * In slave mode, a tmod register in the wrapper also needs to be set. Currently
+	 * the address not in MDK so temp fix.
+	 */
+	uintptr_t tmod_addr = (uintptr_t)preg + QSPI_TMOD_OFFSET;
+
+	sys_write32(tmod, tmod_addr);
+
+	preg->CONFIG.TXBURSTLENGTH = (config->tx_fifo_depth_minus_1+1)-config->dma_tx_data_level;
+	preg->CONFIG.RXBURSTLENGTH = config->dma_rx_data_level+1;
+	preg->DMA.CONFIG.LISTPTR = (uint32_t)transfer_list;
+	/* TODO: QSPI_INTEN_CORE or using INTENSET bricks the system. Needed for XIP? */
+
+	preg->INTEN = BIT(QSPI_INTEN_DMADONE_Pos);
+
+	return 0;
+}
+
+static inline bool vendor_specific_dma_accessible_check(const struct device *dev,
+							const uint8_t *data_buf)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	return nrf_dma_accessible_check(preg, data_buf);
+}
+
+static inline bool vendor_specific_read_dma_irq(const struct device *dev)
+{
+	const struct mspi_dw_config *config = dev->config;
+	NRF_QSPI_Type *preg = (NRF_QSPI_Type *)config->wrapper_regs;
+
+	return (bool) preg->EVENTS_DMA.DONE;
+}
+
+#else /* Supply empty vendor specific macros for generic case */
+
+/* Empty macros for generic case - no DMA support */
+#define MSPI_DW_DMA_XFER_LIST_DEFINE(inst)
+#define MSPI_DW_DMA_XFER_LIST_GET(inst) NULL
+#define MSPI_DW_DMA_JOBLIST_GET(inst) NULL
+
 static inline void vendor_specific_init(const struct device *dev)
 {
 	ARG_UNUSED(dev);
@@ -134,4 +350,33 @@ static inline int vendor_specific_xip_disable(const struct device *dev,
 
 	return 0;
 }
-#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) */
+#if defined(CONFIG_MSPI_DMA)
+static inline void vendor_specific_start_dma_xfer(const struct device *dev)
+{
+	ARG_UNUSED(dev);
+}
+static inline int vendor_specific_setup_dma_xfer(const struct device *dev,
+						 const struct mspi_xfer_packet *packet,
+						 const struct mspi_xfer *xfer)
+{
+	ARG_UNUSED(dev);
+	ARG_UNUSED(packet);
+	ARG_UNUSED(xfer);
+
+	return 0;
+}
+static inline bool vendor_specific_dma_accessible_check(const struct device *dev,
+							uint8_t *data_buf) {
+	ARG_UNUSED(dev);
+	ARG_UNUSED(data_buf);
+
+	return true;
+}
+static inline bool vendor_specific_read_dma_irq(const struct device *dev)
+{
+	ARG_UNUSED(dev);
+
+	return true;
+}
+#endif /* defined(CONFIG_MSPI_DMA) */
+#endif /* Empty vendor specific macros */

dts/bindings/mspi/nordic,nrf-mspi.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2025 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+description: Nordic MSPI Interface using SSI IP
+
+compatible: "nordic,nrf-mspi"
+
+include: snps,designware-ssi.yaml