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nhutnguyenkckartben
nhutnguyenkc
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drivers: interrupt_controller: Add support for RZ/T2L
Add interrupt controller for RZ/T2L Signed-off-by: Nhut Nguyen <[email protected]> Signed-off-by: Hieu Nguyen <[email protected]>
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+154
-3
lines changed

2 files changed

+154
-3
lines changed

‎drivers/interrupt_controller/intc_renesas_rz_ext_irq.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@
1515
#if defined(CONFIG_SOC_SERIES_RZG3S)
1616
#include <instances/rzg/r_intc_irq.h>
1717
#include <instances/rzg/r_intc_nmi.h>
18-
#elif defined(CONFIG_SOC_SERIES_RZN2L)
18+
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
1919
#include <instances/rzn/r_icu.h>
2020
#endif /* CONFIG_SOC_SERIES_* */
2121
#include <zephyr/drivers/interrupt_controller/intc_rz_ext_irq.h>
@@ -39,7 +39,7 @@ struct intc_rz_ext_irq_data {
3939
#if defined(CONFIG_SOC_SERIES_RZG3S)
4040
void r_intc_irq_isr(void);
4141
void r_intc_nmi_isr(void);
42-
#elif defined(CONFIG_SOC_SERIES_RZN2L)
42+
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
4343
void r_icu_isr(void);
4444
#endif /* CONFIG_SOC_SERIES_* */
4545

@@ -234,6 +234,6 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args)
234234

235235
#if defined(CONFIG_SOC_SERIES_RZG3S)
236236
DT_INST_FOREACH_STATUS_OKAY(INTC_RZG_EXT_IRQ_INIT)
237-
#elif defined(CONFIG_SOC_SERIES_RZN2L)
237+
#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L)
238238
DT_INST_FOREACH_STATUS_OKAY(INTC_RZTN_EXT_IRQ_INIT)
239239
#endif

‎dts/arm/renesas/rz/rzt/r9a07g074.dtsi‎

Lines changed: 151 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,157 @@
8989
};
9090
};
9191

92+
icu: icu@81048000 {
93+
reg = <0x81048000 0x1000>;
94+
interrupt-parent = <&gic>;
95+
#address-cells = <1>;
96+
#size-cells = <0>;
97+
98+
irq0: irq0@0 {
99+
compatible = "renesas,rz-ext-irq";
100+
reg = <0x0>;
101+
interrupts = <GIC_SPI 6 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
102+
interrupt-controller;
103+
#interrupt-cells = <2>;
104+
status = "disabled";
105+
};
106+
107+
irq1: irq@1 {
108+
compatible = "renesas,rz-ext-irq";
109+
reg = <0x1>;
110+
interrupts = <GIC_SPI 7 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
111+
interrupt-controller;
112+
#interrupt-cells = <2>;
113+
status = "disabled";
114+
};
115+
116+
irq2: irq@2 {
117+
compatible = "renesas,rz-ext-irq";
118+
reg = <0x2>;
119+
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
120+
interrupt-controller;
121+
#interrupt-cells = <2>;
122+
status = "disabled";
123+
};
124+
125+
irq3: irq@3 {
126+
compatible = "renesas,rz-ext-irq";
127+
reg = <0x3>;
128+
interrupts = <GIC_SPI 9 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
129+
interrupt-controller;
130+
#interrupt-cells = <2>;
131+
status = "disabled";
132+
};
133+
134+
irq4: irq@4 {
135+
compatible = "renesas,rz-ext-irq";
136+
reg = <0x4>;
137+
interrupts = <GIC_SPI 10 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
138+
interrupt-controller;
139+
#interrupt-cells = <2>;
140+
status = "disabled";
141+
};
142+
143+
irq5: irq@5 {
144+
compatible = "renesas,rz-ext-irq";
145+
reg = <0x5>;
146+
interrupts = <GIC_SPI 11 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
147+
interrupt-controller;
148+
#interrupt-cells = <2>;
149+
status = "disabled";
150+
};
151+
152+
irq6: irq@6 {
153+
compatible = "renesas,rz-ext-irq";
154+
reg = <0x6>;
155+
interrupts = <GIC_SPI 12 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
156+
interrupt-controller;
157+
#interrupt-cells = <2>;
158+
status = "disabled";
159+
};
160+
161+
irq7: irq@7 {
162+
compatible = "renesas,rz-ext-irq";
163+
reg = <0x7>;
164+
interrupts = <GIC_SPI 13 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
165+
interrupt-controller;
166+
#interrupt-cells = <2>;
167+
status = "disabled";
168+
};
169+
170+
irq8: irq@8 {
171+
compatible = "renesas,rz-ext-irq";
172+
reg = <0x8>;
173+
interrupts = <GIC_SPI 14 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
174+
interrupt-controller;
175+
#interrupt-cells = <2>;
176+
status = "disabled";
177+
};
178+
179+
irq9: irq@9 {
180+
compatible = "renesas,rz-ext-irq";
181+
reg = <0x9>;
182+
interrupts = <GIC_SPI 15 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
183+
interrupt-controller;
184+
#interrupt-cells = <2>;
185+
status = "disabled";
186+
};
187+
188+
irq10: irq@a {
189+
compatible = "renesas,rz-ext-irq";
190+
reg = <0xa>;
191+
interrupts = <GIC_SPI 16 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
192+
interrupt-controller;
193+
#interrupt-cells = <2>;
194+
status = "disabled";
195+
};
196+
197+
irq11: irq@b {
198+
compatible = "renesas,rz-ext-irq";
199+
reg = <0xb>;
200+
interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
201+
interrupt-controller;
202+
#interrupt-cells = <2>;
203+
status = "disabled";
204+
};
205+
206+
irq12: irq@c {
207+
compatible = "renesas,rz-ext-irq";
208+
reg = <0xc>;
209+
interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
210+
interrupt-controller;
211+
#interrupt-cells = <2>;
212+
status = "disabled";
213+
};
214+
215+
irq13: irq@d {
216+
compatible = "renesas,rz-ext-irq";
217+
reg = <0xd>;
218+
interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
219+
interrupt-controller;
220+
#interrupt-cells = <2>;
221+
status = "disabled";
222+
};
223+
224+
irq14: irq@e {
225+
compatible = "renesas,rz-ext-irq";
226+
reg = <0xe>;
227+
interrupts = <GIC_SPI 394 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
228+
interrupt-controller;
229+
#interrupt-cells = <2>;
230+
status = "disabled";
231+
};
232+
233+
irq15: irq@f {
234+
compatible = "renesas,rz-ext-irq";
235+
reg = <0xf>;
236+
interrupts = <GIC_SPI 395 IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
237+
interrupt-controller;
238+
#interrupt-cells = <2>;
239+
status = "disabled";
240+
};
241+
};
242+
92243
pinctrl: pinctrl@800a0000 {
93244
compatible = "renesas,rzt-pinctrl";
94245
reg = <0x800a0000 0x1000 0x81030c00 0x1000>;

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