drivers: sdhc: Implement NXP USDHC SDHC driver

Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.

Signed-off-by: Daniel DeGrasse <[email protected]>

Author: danieldegrasse

CODEOWNERS

@@ -399,6 +399,7 @@
 /drivers/spi/*b91*                        @yurvyn
 /drivers/spi/spi_rv32m1_lpspi*            @karstenkoenig
 /drivers/spi/*esp32*                      @glaubermaroto
+/drivers/sdhc/                            @danieldegrasse
 /drivers/timer/*apic*                     @dcpleung @nashif
 /drivers/timer/apic_tsc.c                 @andyross
 /drivers/timer/*arm_arch*                 @carlocaione

drivers/CMakeLists.txt

@@ -31,6 +31,7 @@ add_subdirectory_ifdef(CONFIG_PINMUX pinmux)
 add_subdirectory_ifdef(CONFIG_PWM pwm)
 add_subdirectory_ifdef(CONFIG_SENSOR sensor)
 add_subdirectory_ifdef(CONFIG_SPI spi)
+add_subdirectory_ifdef(CONFIG_SDHC sdhc)
 add_subdirectory_ifdef(CONFIG_WATCHDOG watchdog)
 add_subdirectory_ifdef(CONFIG_WIFI wifi)
 add_subdirectory_ifdef(CONFIG_CAN can)

drivers/Kconfig

@@ -39,6 +39,8 @@ source "drivers/interrupt_controller/Kconfig.shared_irq"
 
 source "drivers/spi/Kconfig"
 
+source "drivers/sdhc/Kconfig"
+
 source "drivers/i2c/Kconfig"
 
 source "drivers/i2s/Kconfig"

drivers/clock_control/clock_control_mcux_ccm.c

@@ -96,14 +96,14 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
 		break;
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
 	case IMX_CCM_USDHC1_CLK:
 		*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
 				(CLOCK_GetDiv(kCLOCK_Usdhc1Div) + 1U);
 		break;
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc2), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc2), okay) && CONFIG_IMX_USDHC
 	case IMX_CCM_USDHC2_CLK:
 		*rate = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0) /
 				(CLOCK_GetDiv(kCLOCK_Usdhc2Div) + 1U);

drivers/sdhc/CMakeLists.txt

@@ -0,0 +1,7 @@
+# Copyright (c) 2022 NXP
+# SPDX-License-Identifier: Apache-2.0
+if (CONFIG_SDHC)
+
+zephyr_library()
+zephyr_library_sources_ifdef(CONFIG_IMX_USDHC imx_usdhc.c)
+endif()

drivers/sdhc/Kconfig

@@ -0,0 +1,51 @@
+# Copyright 2022 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+menuconfig SDHC
+	bool "SDHC drivers"
+	help
+	  Include drivers for SD host controller
+
+if SDHC
+
+source "drivers/sdhc/Kconfig.imx"
+
+config SDHC_INIT_PRIORITY
+	int "SDHC driver init priority"
+	default 85
+	help
+	  SDHC driver system init priority
+
+config SDHC_BUFFER_ALIGNMENT
+	int
+	default 1
+	help
+	  Some SD host controllers require alignment of their data buffers
+	  in order to DMA to work correctly. Devices should change default of
+	  this value if they require alignment. This represents the alignment
+	  of buffers required in bytes
+
+config SDHC_SUPPORTS_UHS
+	bool
+	help
+	  Selected by host controller driver if UHS support is present. required
+	  to enable UHS portion of protocol stack.
+
+config SDHC_SUPPORTS_SPI_MODE
+	bool
+	help
+	  Selected by host controller driver if SPI mode support is required.
+	  Enables SPI protocol in SD protocol stack
+
+config SDHC_SUPPORTS_NATIVE_MODE
+	bool
+	help
+	  Selected by host controller driver if native SD mode support is
+	  required. Enables native protocol in SD protocol stack.
+
+module = SDHC
+module-str = sdhc
+source "subsys/logging/Kconfig.template.log_config"
+
+
+endif # SDHC

drivers/sdhc/Kconfig.imx

@@ -0,0 +1,42 @@
+# Copyright (c) 2022, NXP
+# SPDX -License-Identifier: Apache-2.0
+
+config IMX_USDHC
+	bool "NXP IMX USDHC Driver"
+	depends on (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2)
+	select SDHC_SUPPORTS_UHS
+	select SDHC_SUPPORTS_NATIVE_MODE
+	help
+	  Enable the NXP IMX SD Host controller driver
+
+if IMX_USDHC
+
+config IMX_USDHC_DAT3_PWR_TOGGLE
+	bool "Toggle power when pulling DAT3 line low"
+	default y
+	help
+	  Toggle power to SD card to clear DAT3 pull when pulling line low
+
+config IMX_USDHC_DMA_SUPPORT
+	bool
+	depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT
+	default y
+	select NOCACHE_MEMORY
+
+if IMX_USDHC_DMA_SUPPORT
+
+# USDHC DMA needs 32 bit aligned buffers
+config SDHC_BUFFER_ALIGNMENT
+	default 4
+
+config IMX_USDHC_DMA_BUFFER_SIZE
+	int "Size of DMA descriptor buffer in bytes"
+	default 128
+	help
+	  Size of USDHC ADMA descriptor buffer in bytes
+
+endif # IMX_USDHC_DMA_SUPPORT
+
+
+
+endif