dts: bindings: fix typo

arifbalik · kartben · commit 6c06d2d33efd · 2024-12-26T03:34:44.000+01:00
Just copied and pasted the example and got an error because of the typo

Signed-off-by: Arif Balik &lt;arifbalik@outlook.com&gt;
diff --git a/dts/bindings/clock/st,stm32-rcc.yaml b/dts/bindings/clock/st,stm32-rcc.yaml
@@ -20,8 +20,8 @@ description: |
            clocks = <&pll>;  /* Select 80MHz pll as SYSCLK source */
            ahb-prescaler = <2>;
            clock-frequency = <DT_FREQ_M(40)>; /* = SYSCLK / AHB prescaler */
-           apb1-presacler = <1>;
-           apb2-presacler = <1>;
+           apb1-prescaler = <1>;
+           apb2-prescaler = <1>;
   }
 
   Specifying a gated clock:
