Skip to content

Commit 6cacb70

Browse files
Holt-Sunnashif
authored andcommitted
soc: nxp: lpc55XXX: add cache support for LPC55S36
Enable instruction cache support for LPC55S36 SoC: - Select CPU_HAS_ICACHE and HAS_MCUX_SYSCON_LPCAC - Enable CACHE_MANAGEMENT and EXTERNAL_CACHE by default - Set ICACHE_LINE_SIZE to 256 bytes This enables the SYSCON LPCAC cache driver for improved performance on the LPC55S36 SoC. Signed-off-by: Holt Sun <[email protected]>
1 parent aa6f7e9 commit 6cacb70

File tree

2 files changed

+19
-2
lines changed

2 files changed

+19
-2
lines changed

soc/nxp/lpc/lpc55xxx/Kconfig

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# Copyright 2019,2024 NXP
1+
# Copyright 2019, 2024-2025 NXP
22
# SPDX-License-Identifier: Apache-2.0
33

44
config SOC_SERIES_LPC55XXX
@@ -45,6 +45,8 @@ config SOC_LPC55S36
4545
select CPU_HAS_FPU
4646
select ARMV8_M_DSP
4747
select ARM_TRUSTZONE_M
48+
select CPU_HAS_ICACHE
49+
select HAS_MCUX_SYSCON_LPCAC
4850

4951
config SOC_LPC55S69
5052
select CPU_CORTEX_M33

soc/nxp/lpc/lpc55xxx/Kconfig.defconfig

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# Copyright 2019,2024 NXP
1+
# Copyright 2019, 2024-2025 NXP
22
# SPDX-License-Identifier: Apache-2.0
33

44
if SOC_SERIES_LPC55XXX
@@ -53,6 +53,21 @@ config CAN_MCUX_MCAN
5353

5454
endif # SOC_LPC55S16
5555

56+
if SOC_LPC55S36
57+
58+
# Enable cache management features
59+
config CACHE_MANAGEMENT
60+
default y
61+
62+
choice CACHE_TYPE
63+
default EXTERNAL_CACHE
64+
endchoice
65+
66+
config ICACHE_LINE_SIZE
67+
default 256
68+
69+
endif # SOC_LPC55S36
70+
5671
if SOC_LPC55S69_CPU0
5772

5873
config SOC_FLASH_MCUX

0 commit comments

Comments
 (0)