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soc: imxrt7xx: Split Kconfig files to CPU folders
For better organization, split the Kconfig files into one per each CPU. Also, there was a bug where MFD was made to depend on flexcomm being enabled, when really it probably meant to just default y if flexcomm is enabled. Leave Kconfig.soc in one file for the SOC. Signed-off-by: Declan Snyder <[email protected]>
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‎soc/nxp/imxrt/imxrt7xx/Kconfig

Lines changed: 2 additions & 77 deletions
Original file line numberDiff line numberDiff line change
@@ -1,90 +1,15 @@
11
# Copyright 2024-2025 NXP
22
# SPDX-License-Identifier: Apache-2.0
33

4-
config SOC_MIMXRT798S_CM33_CPU0
5-
select CPU_CORTEX_M33
6-
select CLOCK_CONTROL
7-
select CPU_CORTEX_M_HAS_DWT
8-
select ARM
9-
select CPU_HAS_ARM_SAU
10-
select CPU_HAS_ARM_MPU
11-
select CPU_HAS_FPU
12-
select ARMV8_M_DSP
13-
select ARM_TRUSTZONE_M
14-
select CPU_CORTEX_M_HAS_SYSTICK
15-
select HAS_MCUX
16-
select HAS_MCUX_XCACHE
17-
select CACHE_MANAGEMENT
18-
select CPU_HAS_ICACHE
19-
select CPU_HAS_DCACHE
20-
select INIT_ARCH_HW_AT_BOOT
21-
select SOC_RESET_HOOK
22-
select SOC_EARLY_INIT_HOOK
23-
24-
config SOC_MIMXRT798S_CM33_CPU1
25-
select CPU_CORTEX_M33
26-
select CLOCK_CONTROL
27-
select CPU_CORTEX_M_HAS_DWT
28-
select ARM
29-
select CPU_HAS_ARM_SAU
30-
select CPU_HAS_ARM_MPU
31-
select CPU_HAS_FPU
32-
select ARMV8_M_DSP
33-
select ARM_TRUSTZONE_M
34-
select CPU_CORTEX_M_HAS_SYSTICK
35-
select HAS_MCUX
36-
37-
config SOC_MIMXRT798S_HIFI4
38-
select XTENSA
39-
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
40-
select XTENSA_RESET_VECTOR
41-
select XTENSA_USE_CORE_CRT1
42-
select XTENSA_GEN_HANDLERS
43-
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
44-
select GEN_ISR_TABLES
45-
select CLOCK_CONTROL
46-
select SOC_EARLY_INIT_HOOK
47-
select NXP_INPUTMUX
48-
select HAS_MCUX
49-
50-
config SOC_MIMXRT798S_HIFI1
51-
select XTENSA
52-
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
53-
select XTENSA_RESET_VECTOR
54-
select XTENSA_USE_CORE_CRT1
55-
select XTENSA_GEN_HANDLERS
56-
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
57-
select GEN_ISR_TABLES
58-
select HAS_MCUX
59-
604
if SOC_SERIES_IMXRT7XX
615

62-
if NXP_IMXRT_BOOT_HEADER
6+
rsource "*/Kconfig"
637

648
config IMAGE_VECTOR_TABLE_OFFSET
65-
default 0x4000
66-
67-
endif # NXP_IMXRT_BOOT_HEADER
9+
default 0x4000 if NXP_IMXRT_BOOT_HEADER
6810

6911
config GLIKEY_MCUX_GLIKEY
7012
default y
7113
bool "Use glikey MCUX Driver"
7214

73-
config MCUX_CORE_SUFFIX
74-
default "_cm33_core0" if SOC_MIMXRT798S_CM33_CPU0
75-
default "_cm33_core1" if SOC_MIMXRT798S_CM33_CPU1
76-
default "_hifi4" if SOC_MIMXRT798S_HIFI4
77-
default "_hifi1" if SOC_MIMXRT798S_HIFI1
78-
79-
if SOC_MIMXRT798S_HIFI4
80-
81-
config RT798_HIFI4_STACK_SIZE
82-
hex "Boot time stack size"
83-
default 0x1000
84-
help
85-
Stack space is reserved at the end of the data region, starting at
86-
(data base - RT798_HIFI4_STACK_SIZE).
87-
88-
endif # SOC_MIMXRT798S_HIFI4
89-
9015
endif # SOC_SERIES_IMXRT7XX

‎soc/nxp/imxrt/imxrt7xx/Kconfig.defconfig

Lines changed: 2 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -1,88 +1,7 @@
11
# Copyright 2024-2025 NXP
22
# SPDX-License-Identifier: Apache-2.0
33

4-
if SOC_MIMXRT798S_CM33_CPU0
5-
6-
config ROM_START_OFFSET
7-
default 0x4000 if NXP_IMXRT_BOOT_HEADER
8-
9-
config NUM_IRQS
10-
default 158
11-
12-
config SYS_CLOCK_HW_CYCLES_PER_SEC
13-
default 237500000 if CORTEX_M_SYSTICK
14-
default 1000000 if MCUX_OS_TIMER
15-
16-
choice CACHE_TYPE
17-
default EXTERNAL_CACHE
18-
endchoice
19-
20-
# The existing SAI diver cannot initialize the PLL on the board,
21-
# so the PLL settings will not be performed in the driver.
22-
config I2S_HAS_PLL_SETTING
23-
default n
24-
25-
endif # SOC_MIMXRT798S_CM33_CPU0
26-
27-
if SOC_MIMXRT798S_CM33_CPU1
28-
29-
config NUM_IRQS
30-
default 93
31-
32-
config SYS_CLOCK_HW_CYCLES_PER_SEC
33-
default 100000000 if CORTEX_M_SYSTICK
34-
default 1000000 if MCUX_OS_TIMER
35-
36-
endif # SOC_MIMXRT798S_CM33_CPU1
4+
rsource "*/Kconfig.defconfig"
375

386
config MFD
39-
default y
40-
depends on DT_HAS_NXP_LP_FLEXCOMM_ENABLED
41-
42-
if SOC_MIMXRT798S_HIFI4
43-
44-
config SYS_CLOCK_HW_CYCLES_PER_SEC
45-
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
46-
47-
config XTENSA_TIMER
48-
default y
49-
50-
config XTENSA_CCOUNT_HZ
51-
default SYS_CLOCK_HW_CYCLES_PER_SEC
52-
53-
config SYS_CLOCK_TICKS_PER_SEC
54-
default 1000
55-
56-
config GEN_IRQ_VECTOR_TABLE
57-
default n
58-
59-
config NXP_IMXRT_BOOT_HEADER
60-
default n
61-
62-
# Same reasoning as above.
63-
config I2S_HAS_PLL_SETTING
64-
default n
65-
66-
endif # SOC_MIMXRT798S_HIFI4
67-
68-
if SOC_MIMXRT798S_HIFI1
69-
70-
config SYS_CLOCK_HW_CYCLES_PER_SEC
71-
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
72-
73-
config XTENSA_TIMER
74-
default y
75-
76-
config GEN_IRQ_VECTOR_TABLE
77-
default n
78-
79-
config NXP_IMXRT_BOOT_HEADER
80-
default n
81-
82-
config XTENSA_CCOUNT_HZ
83-
default SYS_CLOCK_HW_CYCLES_PER_SEC
84-
85-
config SYS_CLOCK_TICKS_PER_SEC
86-
default 1000
87-
88-
endif # SOC_MIMXRT798S_HIFI1
7+
default y if DT_HAS_NXP_LP_FLEXCOMM_ENABLED

‎soc/nxp/imxrt/imxrt7xx/cm33/Kconfig

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_MIMXRT798S_CM33_CPU0
5+
select CPU_CORTEX_M33
6+
select CLOCK_CONTROL
7+
select CPU_CORTEX_M_HAS_DWT
8+
select ARM
9+
select CPU_HAS_ARM_SAU
10+
select CPU_HAS_ARM_MPU
11+
select CPU_HAS_FPU
12+
select ARMV8_M_DSP
13+
select ARM_TRUSTZONE_M
14+
select CPU_CORTEX_M_HAS_SYSTICK
15+
select HAS_MCUX
16+
select HAS_MCUX_XCACHE
17+
select CACHE_MANAGEMENT
18+
select CPU_HAS_ICACHE
19+
select CPU_HAS_DCACHE
20+
select INIT_ARCH_HW_AT_BOOT
21+
select SOC_RESET_HOOK
22+
select SOC_EARLY_INIT_HOOK
23+
24+
config SOC_MIMXRT798S_CM33_CPU1
25+
select CPU_CORTEX_M33
26+
select CLOCK_CONTROL
27+
select CPU_CORTEX_M_HAS_DWT
28+
select ARM
29+
select CPU_HAS_ARM_SAU
30+
select CPU_HAS_ARM_MPU
31+
select CPU_HAS_FPU
32+
select ARMV8_M_DSP
33+
select ARM_TRUSTZONE_M
34+
select CPU_CORTEX_M_HAS_SYSTICK
35+
select HAS_MCUX
36+
37+
config MCUX_CORE_SUFFIX
38+
default "_cm33_core0" if SOC_MIMXRT798S_CM33_CPU0
39+
default "_cm33_core1" if SOC_MIMXRT798S_CM33_CPU1

‎soc/nxp/imxrt/imxrt7xx/cm33/Kconfig.defconfig

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config NUM_IRQS
5+
default 158 if SOC_MIMXRT798S_CM33_CPU0
6+
default 93 if SOC_MIMXRT798S_CM33_CPU1
7+
8+
if SOC_MIMXRT798S_CM33_CPU0
9+
10+
config ROM_START_OFFSET
11+
default 0x4000 if NXP_IMXRT_BOOT_HEADER
12+
13+
config SYS_CLOCK_HW_CYCLES_PER_SEC
14+
default 237500000 if CORTEX_M_SYSTICK
15+
default 1000000 if MCUX_OS_TIMER
16+
17+
choice CACHE_TYPE
18+
default EXTERNAL_CACHE
19+
endchoice
20+
21+
# The existing SAI diver cannot initialize the PLL on the board,
22+
# so the PLL settings will not be performed in the driver.
23+
config I2S_HAS_PLL_SETTING
24+
default n
25+
26+
endif # SOC_MIMXRT798S_CM33_CPU0
27+
28+
29+
if SOC_MIMXRT798S_CM33_CPU1
30+
31+
config SYS_CLOCK_HW_CYCLES_PER_SEC
32+
default 100000000 if CORTEX_M_SYSTICK
33+
default 1000000 if MCUX_OS_TIMER
34+
35+
endif # SOC_MIMXRT798S_CM33_CPU1

‎soc/nxp/imxrt/imxrt7xx/hifi1/Kconfig

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_MIMXRT798S_HIFI1
5+
select XTENSA
6+
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
7+
select XTENSA_RESET_VECTOR
8+
select XTENSA_USE_CORE_CRT1
9+
select XTENSA_GEN_HANDLERS
10+
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
11+
select GEN_ISR_TABLES
12+
select HAS_MCUX
13+
14+
config MCUX_CORE_SUFFIX
15+
default "_hifi1" if SOC_MIMXRT798S_HIFI1

‎soc/nxp/imxrt/imxrt7xx/hifi1/Kconfig.defconfig

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if SOC_MIMXRT798S_HIFI1
5+
6+
config SYS_CLOCK_HW_CYCLES_PER_SEC
7+
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
8+
9+
config XTENSA_TIMER
10+
default y
11+
12+
config GEN_IRQ_VECTOR_TABLE
13+
default n
14+
15+
config NXP_IMXRT_BOOT_HEADER
16+
default n
17+
18+
config XTENSA_CCOUNT_HZ
19+
default SYS_CLOCK_HW_CYCLES_PER_SEC
20+
21+
config SYS_CLOCK_TICKS_PER_SEC
22+
default 1000
23+
24+
endif # SOC_MIMXRT798S_HIFI1

‎soc/nxp/imxrt/imxrt7xx/hifi4/Kconfig

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config SOC_MIMXRT798S_HIFI4
5+
select XTENSA
6+
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
7+
select XTENSA_RESET_VECTOR
8+
select XTENSA_USE_CORE_CRT1
9+
select XTENSA_GEN_HANDLERS
10+
select XTENSA_SMALL_VECTOR_TABLE_ENTRY
11+
select GEN_ISR_TABLES
12+
select CLOCK_CONTROL
13+
select SOC_EARLY_INIT_HOOK
14+
select NXP_INPUTMUX
15+
select HAS_MCUX
16+
17+
config MCUX_CORE_SUFFIX
18+
default "_hifi4"
19+
20+
config RT798_HIFI4_STACK_SIZE
21+
hex "Boot time stack size"
22+
default 0x1000
23+
depends on SOC_MIMXRT798S_HIFI4
24+
help
25+
Stack space is reserved at the end of the data region, starting at
26+
(data base - RT798_HIFI4_STACK_SIZE).

‎soc/nxp/imxrt/imxrt7xx/hifi4/Kconfig.defconfig

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,27 @@
1+
# Copyright 2024-2025 NXP
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if SOC_MIMXRT798S_HIFI4
5+
6+
config SYS_CLOCK_HW_CYCLES_PER_SEC
7+
default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency)
8+
9+
config XTENSA_TIMER
10+
default y
11+
12+
config XTENSA_CCOUNT_HZ
13+
default SYS_CLOCK_HW_CYCLES_PER_SEC
14+
15+
config SYS_CLOCK_TICKS_PER_SEC
16+
default 1000
17+
18+
config GEN_IRQ_VECTOR_TABLE
19+
default n
20+
21+
config NXP_IMXRT_BOOT_HEADER
22+
default n
23+
24+
config I2S_HAS_PLL_SETTING
25+
default n
26+
27+
endif # SOC_MIMXRT798S_HIFI4

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