drivers: wifi: siwx91x: SiWx91x high performance configurations

To enhance throughput performance on the SiWx91x series, certain
configurations need to be enabled in the SiWx91x.

Signed-off-by: Rahul Gurram <[email protected]>

Author: ragurram26

drivers/wifi/siwx91x/Kconfig.siwx91x

@@ -178,4 +178,11 @@ config WIFI_SILABS_SIWX91X_ENABLE_INSTANT_SCAN
 # This device supports filtering scan results for only one SSID.
 config WIFI_MGMT_SCAN_SSID_FILT_MAX
 	default 1
+
+config WIFI_SIWX91X_HIGH_THROUGHPUT
+	bool "high throughput"
+	help
+	  Enable this option to improve the throughput performance of the SiWx91x
+	  series. This feature provides enhanced data transfer capabilities and
+	  improved network performance.
 endif

dts/arm/silabs/siwg917.dtsi

@@ -63,7 +63,7 @@
 		 * Less memory is allocated to Zephyr, more memory is allocated
 		 * to NWP, better are the WiFi and BLE performances.
 		 */
-		reg = <0x00000400 DT_SIZE_K(255)>;
+		reg = <0x00000400 DT_SIZE_K(319)>;
 	};
 
 	sram_dma1: memory-dma@24061c00 {

soc/silabs/silabs_siwx91x/siwg917/siwx91x_nwp.c

@@ -35,6 +35,20 @@ BUILD_ASSERT(DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) == KB(195) ||
 	     DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) == KB(255) ||
 	     DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) == KB(319));
 
+#ifdef CONFIG_WIFI_SILABS_SIWX91X
+#ifndef TX_POOL_RATIO
+#define TX_POOL_RATIO 1
+#endif
+
+#ifndef RX_POOL_RATIO
+#define RX_POOL_RATIO 1
+#endif
+
+#ifndef GLOBAL_POOL_RATIO
+#define GLOBAL_POOL_RATIO 1
+#endif
+#endif
+
 struct siwx91x_nwp_data {
 	char current_country_code[WIFI_COUNTRY_CODE_LEN];
 };
@@ -173,8 +187,10 @@ static void siwx91x_configure_sta_mode(sl_si91x_boot_configuration_t *boot_confi
 #ifdef CONFIG_WIFI_SILABS_SIWX91X
 	boot_config->ext_tcp_ip_feature_bit_map = SL_SI91X_CONFIG_FEAT_EXTENSION_VALID;
 	boot_config->ext_custom_feature_bit_map |=
-		SL_SI91X_EXT_FEAT_IEEE_80211W |
 		SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0;
+	if (!IS_ENABLED(CONFIG_WIFI_SILABS_SIWX91X)) {
+		boot_config->ext_custom_feature_bit_map |= SL_SI91X_EXT_FEAT_IEEE_80211W;
+	}
 	if (IS_ENABLED(CONFIG_WIFI_SILABS_SIWX91X_ENHANCED_MAX_PSP)) {
 		boot_config->config_feature_bit_map = SL_SI91X_ENABLE_ENHANCED_MAX_PSP;
 	}
@@ -318,17 +334,29 @@ static int siwx91x_get_nwp_config(const struct device *dev,
 					   SL_SI91X_FEAT_SECURITY_PSK | SL_SI91X_FEAT_AGGREGATION |
 					   SL_SI91X_FEAT_HIDE_PSK_CREDENTIALS,
 			.tcp_ip_feature_bit_map = SL_SI91X_TCP_IP_FEAT_EXTENSION_VALID,
-			.custom_feature_bit_map = SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID |
-						  SL_SI91X_CUSTOM_FEAT_ASYNC_CONNECTION_STATUS |
-						  SL_SI91X_CUSTOM_FEAT_RTC_FROM_HOST,
+			.custom_feature_bit_map =
+				IS_ENABLED(CONFIG_WIFI_SILABS_SIWX91X)
+					? (SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_160MHZ |
+					   SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID)
+					: (SL_SI91X_CUSTOM_FEAT_EXTENSION_VALID |
+					   SL_SI91X_CUSTOM_FEAT_ASYNC_CONNECTION_STATUS |
+					   SL_SI91X_CUSTOM_FEAT_RTC_FROM_HOST),
 			.ext_custom_feature_bit_map =
-				SL_SI91X_EXT_FEAT_XTAL_CLK | SL_SI91X_EXT_FEAT_1P8V_SUPPORT |
-				SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION |
-				SL_SI91X_EXT_FEAT_NWP_QSPI_80MHZ_CLK_ENABLE |
-				SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 |
-				SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH |
-				SL_SI91X_EXT_FEAT_XTAL_CLK,
-		}
+				IS_ENABLED(CONFIG_WIFI_SILABS_SIWX91X)
+					? SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0
+					: (SL_SI91X_EXT_FEAT_XTAL_CLK |
+					   SL_SI91X_EXT_FEAT_1P8V_SUPPORT |
+					   SL_SI91X_EXT_FEAT_DISABLE_XTAL_CORRECTION |
+					   SL_SI91X_EXT_FEAT_NWP_QSPI_80MHZ_CLK_ENABLE |
+					   SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 |
+					   SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH |
+					   SL_SI91X_EXT_FEAT_XTAL_CLK),
+		},
+	#if IS_ENABLED(CONFIG_WIFI_SILABS_SIWX91X)
+		.ta_pool = {.tx_ratio_in_buffer_pool = TX_POOL_RATIO,
+					.rx_ratio_in_buffer_pool = RX_POOL_RATIO,
+					.global_ratio_in_buffer_pool = GLOBAL_POOL_RATIO}
+	#endif
 	};
 
 	sl_si91x_boot_configuration_t *boot_config = &default_config.boot_config;