drivers: flash: add andes qspi xip flash driver

Add a flash driver that is used to perform flash operations on a flash
chip that is connected to an Andes QSPI controller and is used for XIP
mode.

The driver is as small as possible, because necessary code has to be
placed in RAM. It is not possible to fetch code from flash while
performing erase/write operations.

Signed-off-by: Dawid Niedzwiecki <[email protected]>

Author: niedzwiecki-dawid

drivers/flash/CMakeLists.txt

@@ -27,6 +27,7 @@ zephyr_library_sources_ifdef(CONFIG_USERSPACE flash_handlers.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_ADI_MAX32_SPIXF flash_max32_spixf_nor.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_AMBIQ flash_ambiq.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_ANDES_QSPI flash_andes_qspi.c)
+zephyr_library_sources_ifdef(CONFIG_FLASH_ANDES_QSPI_XIP flash_andes_qspi_xip.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_CAD_QSPI_NOR flash_cadence_qspi_nor.c flash_cadence_qspi_nor_ll.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_CDNS_NAND flash_cadence_nand.c flash_cadence_nand_ll.c)
 zephyr_library_sources_ifdef(CONFIG_FLASH_INFINEON_CAT1 flash_ifx_cat1.c)
@@ -166,3 +167,6 @@ if(CONFIG_SOC_FLASH_RENESAS_RA_HP)
   zephyr_library_sources(soc_flash_renesas_ra_hp.c)
   zephyr_library_sources_ifdef(CONFIG_FLASH_EX_OP_ENABLED soc_flash_renesas_ra_hp_ex_op.c)
 endif()
+
+# Do not use prologue and epilogue code that uses library function calls
+zephyr_library_compile_options_ifdef(CONFIG_FLASH_ANDES_QSPI_XIP -mno-save-restore)

drivers/flash/Kconfig.andes

@@ -39,6 +39,27 @@ config FLASH_ANDES_QSPI_SFDP_RUNTIME
 
 endchoice
 
+endif
+
+config FLASH_ANDES_QSPI_XIP
+	bool "Andes FLASH driver for XIP chip"
+	default y
+	depends on DT_HAS_ANDESTECH_QSPI_NOR_XIP_ENABLED
+	select FLASH_HAS_PAGE_LAYOUT
+	select FLASH_HAS_DRIVER_ENABLED
+	select FLASH_HAS_EXPLICIT_ERASE
+	depends on XIP
+	depends on !SPI_NOR
+	depends on ARCH_HAS_RAMFUNC_SUPPORT
+	depends on !SMP
+	help
+	  Enable minimalistic driver for Andes QSPI that can be used with a
+	  flash chip that is used for XIP execution. The driver places necessary
+	  code in RAM, because code can not be fetched from flash while
+	  performing erase/write operations.
+
+if FLASH_ANDES_QSPI || FLASH_ANDES_QSPI_XIP
+
 config FLASH_ANDES_QSPI_INIT_PRIORITY
 	int
 	default 80
@@ -56,3 +77,12 @@ config FLASH_ANDES_QSPI_LAYOUT_PAGE_SIZE
 	  sector size.
 
 endif
+
+if FLASH_ANDES_QSPI_XIP
+
+config FLASH_ANDES_QSPI_XIP_COUNT_REGS
+	bool "Use separated write/read count registers"
+	help
+	  The Andes qspi module has separated write/read count registers.
+
+endif

drivers/flash/flash_andes_qspi.h

@@ -46,6 +46,7 @@
 #define TFMAT_SLVMODE_MSK		BIT(2)
 #define TFMAT_DATA_MERGE_MSK		BIT(7)
 #define TFMAT_DATA_LEN_MSK		GENMASK(12, 8)
+#define TFMAT_ADDR_LEN_MSK		GENMASK(17, 16)
 
 /* Field mask of SPI transfer control register */
 #define TCTRL_RD_TCNT_OFFSET		(0)