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Johan Kopra
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boards: added the Sensoan SGW-2 board
Added the sensoan/sgw2 board Signed-off-by: Johan Kopra <[email protected]>
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‎boards/sensoan/index.rst‎

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.. _boards-sensoan:
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Sensoan
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#######
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.. toctree::
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:maxdepth: 1
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:glob:
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**/*

‎boards/sensoan/sgw2/CMakeLists.txt‎

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# Kconfig - SGW-2 board configuration
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#
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# Copyright (c) 2024 Sensoan Oy
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#
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# SPDX-License-Identifier: Apache-2.0
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if((CONFIG_BOARD_SGW2_NRF9160 OR CONFIG_BOARD_SGW2_NRF9160_NS) AND CONFIG_BT_HCI)
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zephyr_library()
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zephyr_library_sources(nrf5340_reset.c)
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endif()

‎boards/sensoan/sgw2/Kconfig‎

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# SGW-2 board configuration
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#
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# Copyright (c) 2024 Sensoan Oy
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#
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_SGW2
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# The GPIO driver is forced here to be enabled whenever nrf5340_reset.c
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# is included. This is the case for sgw2/nrf9160 and sgw2/nrf9160/ns builds
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# whenever BT_HCI is enabled.
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select GPIO if (BOARD_SGW2_NRF9160 || BOARD_SGW2_NRF9160_NS) && BT_HCI
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if BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS || BOARD_SGW2_NRF5340_CPUNET
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if BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS
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config DOMAIN_CPUNET_BOARD
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string
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default "sgw2/nrf5340/cpunet"
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help
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The board which will be used for CPUNET domain when creating a multi
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image application where one or more images should be located on
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another board. For example hci_rpmsg on the nRF5340_cpunet for
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Bluetooth applications.
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endif # BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS
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config DOMAIN_CPUAPP_BOARD
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string
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default "sgw2/nrf5340/cpuapp"
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depends on BOARD_SGW2_NRF5340_CPUNET
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help
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The board which will be used for CPUAPP domain when creating a multi
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image application where one or more images should be located on
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another board.
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endif # BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS || BOARD_SGW2_NRF5340_CPUNET
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module=BOARD
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module-dep=LOG
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module-str=Log level for board
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source "${ZEPHYR_BASE}/subsys/logging/Kconfig.template.log_config"

‎boards/sensoan/sgw2/Kconfig.defconfig‎

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# SGW2 board configuration
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#
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# Copyright (c) 2018 Nordic Semiconductor ASA
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# Copyright (c) 2024 Sensoan Oy
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#
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_SGW2_NRF9160 || BOARD_SGW2_NRF9160_NS
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# For the secure version of the board the firmware is linked at the beginning
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# of the flash, or into the code-partition defined in DT if it is intended to
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# be loaded by MCUboot. If the secure firmware is to be combined with a non-
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# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
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# be restricted to the size of its code partition.
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# For the non-secure version of the board, the firmware
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# must be linked into the code-partition (non-secure) defined in DT, regardless.
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# Apply this configuration below by setting the Kconfig symbols used by
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# the linker according to the information extracted from DT partitions.
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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depends on BOARD_SGW2_NRF9160 && TRUSTED_EXECUTION_SECURE
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if BOARD_SGW2_NRF9160_NS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_SGW2_NRF9160_NS
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config BT_HCI_VS
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default y if BT
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config I2C
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default $(dt_compat_on_bus,$(DT_COMPAT_NXP_PCAL6408A),i2c)
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endif # BOARD_SGW2_NRF9160 || BOARD_SGW2_NRF9160_NS
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if BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS
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# Code Partition:
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#
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# For the secure version of the board the firmware is linked at the beginning
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# of the flash, or into the code-partition defined in DT if it is intended to
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# be loaded by MCUboot. If the secure firmware is to be combined with a non-
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# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
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# be restricted to the size of its code partition.
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#
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# For the non-secure version of the board, the firmware
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# must be linked into the code-partition (non-secure) defined in DT, regardless.
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# Apply this configuration below by setting the Kconfig symbols used by
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# the linker according to the information extracted from DT partitions.
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# SRAM Partition:
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#
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# If the secure firmware is to be combined with a non-secure image
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# (TRUSTED_EXECUTION_SECURE=y), the secure FW image SRAM shall always
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# be restricted to the secure image SRAM partition (sram-secure-partition).
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# Otherwise (if TRUSTED_EXECUTION_SECURE is not set) the whole zephyr,sram
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# may be used by the image.
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#
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# For the non-secure version of the board, the firmware image SRAM is
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# always restricted to the allocated non-secure SRAM partition.
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#
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# Workaround for not being able to have commas in macro arguments
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DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
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DT_CHOSEN_Z_SRAM_PARTITION := zephyr,sram-secure-partition
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if BOARD_SGW2_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config SRAM_SIZE
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default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM_PARTITION),0,K)
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endif # BOARD_SGW2_NRF5340_CPUAPP && TRUSTED_EXECUTION_SECURE
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if BOARD_SGW2_NRF5340_CPUAPP_NS
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config FLASH_LOAD_OFFSET
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default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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config FLASH_LOAD_SIZE
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default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
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endif # BOARD_SGW2_NRF5340_CPUAPP_NS
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config BT_HCI_IPC
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default y if BT
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config HEAP_MEM_POOL_ADD_SIZE_BOARD
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int
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default 4096 if BT_HCI_IPC
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endif # BOARD_SGW2_NRF5340_CPUAPP || BOARD_SGW2_NRF5340_CPUAPP_NS
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if BOARD_SGW2_NRF5340_CPUNET
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config BT_CTLR
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default y if BT
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endif # BOARD_SGW2_NRF5340_CPUNET

‎boards/sensoan/sgw2/Kconfig.sgw2‎

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# SGW-2 board configuration
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#
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# Copyright (c) 2024 Sensoan Oy
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#
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_SGW2
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select SOC_NRF9160_SICA if BOARD_SGW2_NRF9160 || BOARD_SGW2_NRF9160_NS
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select SOC_NRF5340_CPUAPP_QKAA if BOARD_SGW2_NRF5340_CPUAPP
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select SOC_NRF5340_CPUAPP_QKAA if BOARD_SGW2_NRF5340_CPUAPP_NS
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select SOC_NRF5340_CPUNET_QKAA if BOARD_SGW2_NRF5340_CPUNET

‎boards/sensoan/sgw2/board.cmake‎

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# Copyright (c) 2019 Nordic Semiconductor ASA.
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# Copyright (c) 2024 Sensoan Oy
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# SPDX-License-Identifier: Apache-2.0
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if(CONFIG_BOARD_SGW2_NRF9160 OR CONFIG_BOARD_SGW2_NRF9160_NS)
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if(CONFIG_BOARD_SGW2_NRF9160_NS)
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set(TFM_PUBLIC_KEY_FORMAT "full")
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endif()
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if(CONFIG_TFM_FLASH_MERGED_BINARY)
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set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
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endif()
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board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000")
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include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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elseif(CONFIG_BOARD_SGW2_NRF5340_CPUAPP OR CONFIG_BOARD_SGW2_NRF5340_CPUAPP_NS OR CONFIG_BOARD_SGW2_NRF5340_CPUNET)
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if(CONFIG_BOARD_SGW2_NRF5340_CPUAPP_NS)
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set(TFM_PUBLIC_KEY_FORMAT "full")
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endif()
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if(CONFIG_BOARD_SGW2_NRF5340_CPUAPP OR CONFIG_BOARD_SGW2_NRF5340_CPUAPP_NS)
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board_runner_args(jlink "--device=nrf5340_xxaa_app" "--speed=4000")
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endif()
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if(CONFIG_TFM_FLASH_MERGED_BINARY)
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set_property(TARGET runners_yaml_props_target PROPERTY hex_file "${CMAKE_BINARY_DIR}/tfm_merged.hex")
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endif()
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if(CONFIG_BOARD_SGW2_NRF5340_CPUNET)
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board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000")
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endif()
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include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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endif()

‎boards/sensoan/sgw2/board.h‎

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/*
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* Copyright (c) 2024 Sensoan Oy
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/* Internal macros */
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#define PORT(_TYPE, _PIN) _TYPE##_PORT_##_PIN
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#define PIN(_TYPE, _PIN) _TYPE##_PIN_##_PIN
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#define GPIOAUX(_PORT) &gpio##_PORT
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#define GPIO_BY_PORT(_PORT) GPIOAUX(_PORT)
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#define GPIO(_TYPE, _PIN) GPIO_BY_PORT(PORT(_TYPE, _PIN))
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/**
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* Rewrite a pin with a special type as the corresponding GPIO node and pin.
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* These correspondences are encoded in the header files sgw2_nrf5340.h and
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* sgw2_nrf9160.h contained in the board directory.
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*
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* @param _TYPE Pin type (allowed types are MCU_IF and EDGE_CONN)
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* @param _PIN Pin number
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*/
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#define GPIO_AND_PIN(_TYPE, _PIN) GPIO(_TYPE, _PIN) PIN(_TYPE, _PIN)
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/**
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* A wrapper for the NRF_PSEL macro that accepts pins with special types.
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* These are translated into the corresponding GPIO ports and pins
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* for the use of NRF_PSEL via the correspondences encoded in the header files
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* sgw2_nrf5340.h and sgw2_nrf9160.h contained in the board directory.
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*
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* @param _FUN Pin function configuration passed to the NRF_PSEL macro
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* @param _TYPE Pin type (allowed types are MCU_IF and EDGE_CONN)
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* @param _PIN Pin number
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*/
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#define SGW_PSEL(_FUN, _TYPE, _PIN) NRF_PSEL(_FUN, PORT(_TYPE, _PIN), PIN(_TYPE, _PIN))
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#endif /* BOARD_H */

‎boards/sensoan/sgw2/board.yml‎

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board:
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name: sgw2
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vendor: sensoan
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socs:
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- name: nrf9160
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variants:
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- name: 'ns'
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- name: nrf5340
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variants:
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- name: 'ns'
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cpucluster: 'cpuapp'

‎boards/sensoan/sgw2/doc/img/edge_connector.webp‎

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‎boards/sensoan/sgw2/doc/img/sgw2.webp‎

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