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dts: renesas: rx: Add dtc node support on RX26T
Add dtc property node on RX26T dts, and ram section for dtc_vector_table on RX26T SoC for dtc support Signed-off-by: Quy Tran <[email protected]>
1 parent 0e45513 commit 6df2484

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3 files changed

+30
-4
lines changed

3 files changed

+30
-4
lines changed

dts/rx/renesas/rx26t-common.dtsi

Lines changed: 15 additions & 4 deletions
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@@ -55,6 +55,13 @@
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};
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};
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dtc: rx-dtc@82400 {
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compatible = "renesas,rx-dtc";
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reg = <0x00082400 0x1c>;
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clocks = <&iclk MSTPA 28>;
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status = "okay";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
@@ -472,8 +479,9 @@
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tei-number = <2>;
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eri-ctrl = <&group_irq_bl0>;
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eri-number = <3>;
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status = "disabled";
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channel = <1>;
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dtc = <&dtc>;
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status = "disabled";
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uart {
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compatible = "renesas,rx-uart-sci";
@@ -491,8 +499,9 @@
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tei-number = <10>;
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eri-ctrl = <&group_irq_bl0>;
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eri-number = <11>;
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status = "disabled";
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channel = <5>;
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dtc = <&dtc>;
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status = "disabled";
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uart {
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compatible = "renesas,rx-uart-sci";
@@ -510,8 +519,9 @@
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tei-number = <12>;
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eri-ctrl = <&group_irq_bl0>;
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eri-number = <13>;
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status = "disabled";
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channel = <6>;
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dtc = <&dtc>;
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status = "disabled";
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uart {
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compatible = "renesas,rx-uart-sci";
@@ -529,8 +539,9 @@
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tei-number = <16>;
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eri-ctrl = <&group_irq_bl0>;
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eri-number = <17>;
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status = "disabled";
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channel = <12>;
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dtc = <&dtc>;
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status = "disabled";
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uart {
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compatible = "renesas,rx-uart-sci";

soc/renesas/rx/rx26t/CMakeLists.txt

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@@ -8,5 +8,6 @@ zephyr_sources(
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)
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zephyr_linker_sources(SECTIONS ofsm.ld)
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zephyr_linker_sources(RAM_SECTIONS ram_sections.ld)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/rx/linker.ld CACHE INTERNAL "")
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@@ -0,0 +1,14 @@
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/*
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* Copyright (c) 2025 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifdef CONFIG_RENESAS_RX_DTC
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SECTION_DATA_PROLOGUE(.dtc_vector_table,(NOLOAD),)
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{
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/* If DTC is used, put the DTC vector table at the start of SRAM.
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This avoids memory holes due to 1K alignment required by it. */
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*(.dtc_vector_table)
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} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
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#endif

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