kernel: Fix ARM irq_lock() ordering bug.

The inline asm definition of irq_lock() on the ARM architecture marks
the ASM as volatile which prevents the compiler from removing the
isntruction but does provide any information to the compiler to
prevent the inline ASM instruction being re-ordered relative to other
instructions.  The instruction used in irq_lock() do not touch memory,
however in order to acheive their intended purpose they must be
ordered relative to other memory access instruction.  This is acheived
by adding the "memory" clobber.

Instances of the compiler inappropriately re-ordering irq_lock() calls
relative to other instructions without this patch can be observed in
the code generated for k_sleep() on NRF51 target boards.

Signed-off-by: Marcus Shawcroft <[email protected]>
Change-Id: I9d42d54cd9a50e8150c10ce6715af7ca2f5cfe51
(cherry picked from commit 15bc537)

Author: mshawcroft

include/arch/arm/cortex_m/asm_inline_gcc.h

@@ -131,15 +131,17 @@ static ALWAYS_INLINE unsigned int _arch_irq_lock(void)
 #if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
 	__asm__ volatile("mrs %0, PRIMASK;\n\t"
 		"cpsid i;\n\t"
-		: "=r" (key));
+		: "=r" (key)
+		:
+		: "memory");
 #else /* CONFIG_CPU_CORTEX_M3_M4 */
 	__asm__ volatile(
 		"movs.n %%r1, %1;\n\t"
 		"mrs %0, BASEPRI;\n\t"
 		"msr BASEPRI, %%r1;\n\t"
 		: "=r"(key)
 		: "i"(_EXC_IRQ_DEFAULT_PRIO)
-		: "r1");
+		: "r1", "memory");
 #endif
 
 	return key;