boards: intel_adsp: remove unused CONFIG_BOOTLOADER_SRAM_SIZE

nashif · carlescufi · commit 6e7e9c2ba8b9 · 2022-08-31T10:41:22.000+02:00
This option is not being used by xtensa code, so remove it.

Signed-off-by: Anas Nashif &lt;anas.nashif@intel.com&gt;
diff --git a/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15_defconfig b/boards/xtensa/intel_adsp_cavs15/intel_adsp_cavs15_defconfig
@@ -17,6 +17,5 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
diff --git a/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18_defconfig b/boards/xtensa/intel_adsp_cavs18/intel_adsp_cavs18_defconfig
@@ -17,6 +17,5 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_defconfig b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_defconfig
@@ -17,6 +17,5 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
diff --git a/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl_defconfig b/boards/xtensa/intel_adsp_cavs20/intel_adsp_cavs20_jsl_defconfig
@@ -18,6 +18,5 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
diff --git a/boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25_defconfig b/boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25_defconfig
@@ -17,7 +17,6 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
 
diff --git a/boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25_tgph_defconfig b/boards/xtensa/intel_adsp_cavs25/intel_adsp_cavs25_tgph_defconfig
@@ -18,7 +18,6 @@ CONFIG_MULTI_LEVEL_INTERRUPTS=y
 CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_CAVS_ICTL=y
 
-CONFIG_BOOTLOADER_SRAM_SIZE=192
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_CLEANUP_INTERMEDIATE_FILES=y
 
