@@ -846,6 +846,9 @@ static void generate_mac(uint8_t *mac_addr)
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#endif /* NODE_HAS_VALID_MAC_ADDR(DT_DRV_INST(0))) */
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#endif
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+
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+ LOG_DBG ("MAC %02x:%02x:%02x:%02x:%02x:%02x" , mac_addr [0 ], mac_addr [1 ], mac_addr [2 ],
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+ mac_addr [3 ], mac_addr [4 ], mac_addr [5 ]);
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}
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#if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
@@ -990,28 +993,70 @@ static int eth_initialize(const struct device *dev)
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heth -> Init .MACAddr = dev_data -> mac_addr ;
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- #if defined(CONFIG_ETH_STM32_HAL_API_V1 )
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+ #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
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+ HAL_StatusTypeDef hal_ret = HAL_OK ;
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+
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+ #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
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+ for (int ch = 0 ; ch < ETH_DMA_CH_CNT ; ch ++ ) {
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+ heth -> Init .TxDesc [ch ] = dma_tx_desc_tab [ch ];
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+ heth -> Init .RxDesc [ch ] = dma_rx_desc_tab [ch ];
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+ }
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+ #else
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+ heth -> Init .TxDesc = dma_tx_desc_tab ;
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+ heth -> Init .RxDesc = dma_rx_desc_tab ;
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+ #endif
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+ heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
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+
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+ hal_ret = HAL_ETH_Init (heth );
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+ if (hal_ret != HAL_OK ) {
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+ LOG_ERR ("HAL_ETH_Init failed: %d" , hal_ret );
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+ return - EIO ;
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+ }
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+
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+ #if defined(CONFIG_PTP_CLOCK_STM32_HAL )
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+ /* Enable timestamping of RX packets. We enable all packets to be
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+ * timestamped to cover both IEEE 1588 and gPTP.
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+ */
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+ #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32h7_ethernet )
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+ heth -> Instance -> MACTSCR |= ETH_MACTSCR_TSENALL ;
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+ #else
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+ heth -> Instance -> PTPTSCR |= ETH_PTPTSCR_TSSARFE ;
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+ #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
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+ #endif /* CONFIG_PTP_CLOCK_STM32_HAL */
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+
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+ /* Tx config init: */
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+ memset (& tx_config , 0 , sizeof (ETH_TxPacketConfig ));
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+ tx_config .Attributes = ETH_TX_PACKETS_FEATURES_CSUM |
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+ ETH_TX_PACKETS_FEATURES_CRCPAD ;
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+ tx_config .ChecksumCtrl = IS_ENABLED (CONFIG_ETH_STM32_HW_CHECKSUM ) ?
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+ ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC : ETH_CHECKSUM_DISABLE ;
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+ tx_config .CRCPadCtrl = ETH_CRC_PAD_INSERT ;
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+
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+ /* prepare tx buffer header */
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+ for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
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+ dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
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+ }
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+
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+ /* Initialize semaphores */
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+ k_sem_init (& dev_data -> tx_int_sem , 0 , K_SEM_MAX_LIMIT );
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+ #else /* CONFIG_ETH_STM32_HAL_API_V2 */
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ret = eth_stm32_init_v1_api (dev );
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if (ret < 0 ) {
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LOG_ERR ("eth_init_v1_api failed: %d" , ret );
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return - EIO ;
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}
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- /* Initialize semaphores */
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- k_mutex_init (& dev_data -> tx_mutex );
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- k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
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-
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HAL_ETH_DMATxDescListInit (heth , dma_tx_desc_tab ,
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& dma_tx_buffer [0 ][0 ], ETH_TXBUFNB );
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HAL_ETH_DMARxDescListInit (heth , dma_rx_desc_tab ,
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& dma_rx_buffer [0 ][0 ], ETH_RXBUFNB );
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+ #endif /* CONFIG_ETH_STM32_HAL_API_V2 */
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- #endif /* !CONFIG_ETH_STM32_HAL_API_V1 */
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+ /* Initialize semaphores */
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+ k_mutex_init (& dev_data -> tx_mutex );
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+ k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
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- LOG_DBG ("MAC %02x:%02x:%02x:%02x:%02x:%02x" ,
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- dev_data -> mac_addr [0 ], dev_data -> mac_addr [1 ],
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- dev_data -> mac_addr [2 ], dev_data -> mac_addr [3 ],
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- dev_data -> mac_addr [4 ], dev_data -> mac_addr [5 ]);
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+ setup_mac_filter (heth );
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return 0 ;
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}
@@ -1066,71 +1111,6 @@ static void eth_stm32_mcast_filter(const struct device *dev, const struct ethern
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#endif /* CONFIG_ETH_STM32_MULTICAST_FILTER */
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- #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
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- static int eth_init_api_v2 (const struct device * dev )
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- {
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- HAL_StatusTypeDef hal_ret = HAL_OK ;
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- struct eth_stm32_hal_dev_data * dev_data ;
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- ETH_HandleTypeDef * heth ;
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-
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- dev_data = dev -> data ;
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- heth = & dev_data -> heth ;
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-
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- #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32n6_ethernet )
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- for (int ch = 0 ; ch < ETH_DMA_CH_CNT ; ch ++ ) {
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- heth -> Init .TxDesc [ch ] = dma_tx_desc_tab [ch ];
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- heth -> Init .RxDesc [ch ] = dma_rx_desc_tab [ch ];
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- }
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- #else
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- heth -> Init .TxDesc = dma_tx_desc_tab ;
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- heth -> Init .RxDesc = dma_rx_desc_tab ;
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- #endif
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- heth -> Init .RxBuffLen = ETH_STM32_RX_BUF_SIZE ;
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-
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- hal_ret = HAL_ETH_Init (heth );
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- if (hal_ret == HAL_TIMEOUT ) {
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- /* HAL Init time out. This could be linked to */
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- /* a recoverable error. Log the issue and continue */
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- /* driver initialisation */
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- LOG_ERR ("HAL_ETH_Init Timed out" );
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- } else if (hal_ret != HAL_OK ) {
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- LOG_ERR ("HAL_ETH_Init failed: %d" , hal_ret );
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- return - EINVAL ;
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- }
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-
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- #if defined(CONFIG_PTP_CLOCK_STM32_HAL )
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- /* Enable timestamping of RX packets. We enable all packets to be
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- * timestamped to cover both IEEE 1588 and gPTP.
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- */
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- #if DT_HAS_COMPAT_STATUS_OKAY (st_stm32h7_ethernet )
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- heth -> Instance -> MACTSCR |= ETH_MACTSCR_TSENALL ;
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- #else
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- heth -> Instance -> PTPTSCR |= ETH_PTPTSCR_TSSARFE ;
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- #endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_ethernet) */
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- #endif /* CONFIG_PTP_CLOCK_STM32_HAL */
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-
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- /* Initialize semaphores */
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- k_mutex_init (& dev_data -> tx_mutex );
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- k_sem_init (& dev_data -> rx_int_sem , 0 , K_SEM_MAX_LIMIT );
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- k_sem_init (& dev_data -> tx_int_sem , 0 , K_SEM_MAX_LIMIT );
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-
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- /* Tx config init: */
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- memset (& tx_config , 0 , sizeof (ETH_TxPacketConfig ));
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- tx_config .Attributes = ETH_TX_PACKETS_FEATURES_CSUM |
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- ETH_TX_PACKETS_FEATURES_CRCPAD ;
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- tx_config .ChecksumCtrl = IS_ENABLED (CONFIG_ETH_STM32_HW_CHECKSUM ) ?
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- ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC : ETH_CHECKSUM_DISABLE ;
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- tx_config .CRCPadCtrl = ETH_CRC_PAD_INSERT ;
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-
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- /* prepare tx buffer header */
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- for (uint16_t i = 0 ; i < ETH_TXBUFNB ; ++ i ) {
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- dma_tx_buffer_header [i ].tx_buff .buffer = dma_tx_buffer [i ];
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- }
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-
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- return 0 ;
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- }
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- #endif /* CONFIG_ETH_STM32_HAL_API_V2 */
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-
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static void set_mac_config (const struct device * dev , struct phy_link_state * state )
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{
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struct eth_stm32_hal_dev_data * dev_data = dev -> data ;
@@ -1259,16 +1239,6 @@ static void eth_iface_init(struct net_if *iface)
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ethernet_init (iface );
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- #if defined(CONFIG_ETH_STM32_HAL_API_V2 )
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- /* This function requires the Ethernet interface to be
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- * properly initialized. In auto-negotiation mode, it reads the speed
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- * and duplex settings to configure the driver accordingly.
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- */
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- eth_init_api_v2 (dev );
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- #endif
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-
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- setup_mac_filter (heth );
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-
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net_if_carrier_off (iface );
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net_lldp_set_lldpdu (iface );
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