@@ -141,7 +141,7 @@ static inline int qspi_prepare_quad_read(const struct device *dev,
141141{
142142 struct flash_stm32_qspi_data * dev_data = dev -> data ;
143143
144- if (IS_ENABLED ( STM32_QSPI_USE_QUAD_IO ) && dev_data -> flag_quad_io_en ) {
144+ if (dev_data -> flag_quad_io_en ) {
145145 switch (dev_data -> mode ) {
146146 case JESD216_MODE_114 :
147147 cmd -> AddressMode = QSPI_ADDRESS_1_LINE ;
@@ -166,7 +166,7 @@ static inline int qspi_prepare_quad_program(const struct device *dev,
166166{
167167 struct flash_stm32_qspi_data * dev_data = dev -> data ;
168168
169- if (IS_ENABLED ( STM32_QSPI_USE_QUAD_IO ) && dev_data -> flag_quad_io_en ) {
169+ if (dev_data -> flag_quad_io_en ) {
170170 cmd -> Instruction = dev_data -> qspi_write_cmd ;
171171
172172 switch (cmd -> Instruction ) {
@@ -344,10 +344,13 @@ static int flash_stm32_qspi_read(const struct device *dev, off_t addr,
344344 };
345345
346346 qspi_set_address_size (dev , & cmd );
347- ret = qspi_prepare_quad_read (dev , & cmd );
348- if (ret < 0 ) {
349- return ret ;
347+ if (IS_ENABLED (STM32_QSPI_USE_QUAD_IO )) {
348+ ret = qspi_prepare_quad_read (dev , & cmd );
349+ if (ret < 0 ) {
350+ return ret ;
351+ }
350352 }
353+
351354 qspi_lock_thread (dev );
352355
353356 ret = qspi_read_access (dev , & cmd , data , size );
@@ -404,10 +407,13 @@ static int flash_stm32_qspi_write(const struct device *dev, off_t addr,
404407 };
405408
406409 qspi_set_address_size (dev , & cmd_pp );
407- ret = qspi_prepare_quad_program (dev , & cmd_pp );
408- if (ret < 0 ) {
409- return ret ;
410+ if (IS_ENABLED (STM32_QSPI_USE_QUAD_IO )) {
411+ ret = qspi_prepare_quad_program (dev , & cmd_pp );
412+ if (ret < 0 ) {
413+ return ret ;
414+ }
410415 }
416+
411417 qspi_lock_thread (dev );
412418
413419 while (size > 0 ) {
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