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decsnynashif
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drivers: mdio_nxp_enet: Don't disable IRQ
No real need to be enabling and disabling IRQs, this logic has been reported to be causing spurious interrupts and strange behavior, we can just enable the interrupt and switch to interrupt based logic one time and keep the interrupt enabled at that point. Also, fix a W1C bug where |= was used instead of = to clear a flag. Signed-off-by: Declan Snyder <[email protected]> (cherry picked from commit 2ab1046)
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drivers/mdio/mdio_nxp_enet.c

Lines changed: 8 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -41,17 +41,13 @@ struct nxp_enet_mdio_data {
4141
static int nxp_enet_mdio_wait_xfer(const struct device *dev)
4242
{
4343
struct nxp_enet_mdio_data *data = dev->data;
44-
ENET_Type *base = data->base;
4544

4645
/* This function will not make sense from IRQ context */
4746
if (k_is_in_isr()) {
4847
return -EWOULDBLOCK;
4948
}
5049

51-
if (data->interrupt_up) {
52-
/* Enable the interrupt */
53-
base->EIMR |= ENET_EIMR_MII_MASK;
54-
} else {
50+
if (!data->interrupt_up) {
5551
/* If the interrupt is not available to use yet, just busy wait */
5652
k_busy_wait(CONFIG_MDIO_NXP_ENET_TIMEOUT);
5753
k_sem_give(&data->mdio_sem);
@@ -77,7 +73,7 @@ static int nxp_enet_mdio_read(const struct device *dev,
7773
* Clear the bit (W1C) that indicates MDIO transfer is ready to
7874
* prepare to wait for it to be set once this read is done
7975
*/
80-
data->base->EIR |= ENET_EIR_MII_MASK;
76+
data->base->EIR = ENET_EIR_MII_MASK;
8177

8278
/*
8379
* Write MDIO frame to MII management register which will
@@ -105,7 +101,7 @@ static int nxp_enet_mdio_read(const struct device *dev,
105101
*read_data = (data->base->MMFR & ENET_MMFR_DATA_MASK) >> ENET_MMFR_DATA_SHIFT;
106102

107103
/* Clear the same bit as before because the event has been handled */
108-
data->base->EIR |= ENET_EIR_MII_MASK;
104+
data->base->EIR = ENET_EIR_MII_MASK;
109105

110106
/* This MDIO interaction is finished */
111107
(void)k_mutex_unlock(&data->mdio_mutex);
@@ -127,7 +123,7 @@ static int nxp_enet_mdio_write(const struct device *dev,
127123
* Clear the bit (W1C) that indicates MDIO transfer is ready to
128124
* prepare to wait for it to be set once this write is done
129125
*/
130-
data->base->EIR |= ENET_EIR_MII_MASK;
126+
data->base->EIR = ENET_EIR_MII_MASK;
131127

132128
/*
133129
* Write MDIO frame to MII management register which will
@@ -153,7 +149,7 @@ static int nxp_enet_mdio_write(const struct device *dev,
153149
}
154150

155151
/* Clear the same bit as before because the event has been handled */
156-
data->base->EIR |= ENET_EIR_MII_MASK;
152+
data->base->EIR = ENET_EIR_MII_MASK;
157153

158154
/* This MDIO interaction is finished */
159155
(void)k_mutex_unlock(&data->mdio_mutex);
@@ -170,13 +166,9 @@ static void nxp_enet_mdio_isr_cb(const struct device *dev)
170166
{
171167
struct nxp_enet_mdio_data *data = dev->data;
172168

173-
data->base->EIR |= ENET_EIR_MII_MASK;
169+
data->base->EIR = ENET_EIR_MII_MASK;
174170

175-
/* Signal that operation finished */
176171
k_sem_give(&data->mdio_sem);
177-
178-
/* Disable the interrupt */
179-
data->base->EIMR &= ~ENET_EIMR_MII_MASK;
180172
}
181173

182174
static void nxp_enet_mdio_post_module_reset_init(const struct device *dev)
@@ -212,7 +204,9 @@ void nxp_enet_mdio_callback(const struct device *dev,
212204
nxp_enet_mdio_isr_cb(dev);
213205
break;
214206
case NXP_ENET_INTERRUPT_ENABLED:
207+
/* IRQ was enabled in NVIC, now enable in enet */
215208
data->interrupt_up = true;
209+
data->base->EIMR |= ENET_EIMR_MII_MASK;
216210
break;
217211
default:
218212
break;

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