soc: arm: stm32: Add ROM bootloader support

Add jump to ROM bootloader for STM32 when bootmode is set via
retention boot mode feature.

Signed-off-by: Peter Johanson <[email protected]>

Author: petejohanson

dts/bindings/arm/st,stm32-bootloader.yaml

@@ -0,0 +1,12 @@
+# Copyright (c) 2025 Peter Johanson
+# SPDX-License-Identifier: Apache-2.0
+
+description: ST STM32 ROM Bootloader Details
+
+compatible: "st,stm32-bootloader"
+
+include: base.yaml
+
+properties:
+  reg:
+    required: true

soc/st/stm32/Kconfig

@@ -38,6 +38,20 @@ config STM32_BACKUP_SRAM_INIT_PRIORITY
 	help
 	  STM32 Backup SRAM device initialization priority.
 
+config STM32_BOOTLOADER
+	bool "STM32 Bootloader Support"
+	depends on RETENTION_BOOT_MODE && DT_HAS_ST_STM32_BOOTLOADER_ENABLED
+	help
+	  Enable support for jumping into the STM32 bootloader when the
+	  bootmode is set.
+
+config STM32_BOOTLOADER_INIT_PRIORITY
+	int "STM32 bootloader check init priority"
+	default 3
+	help
+	  STM32 bootloader check initialization priority (must be higher than init
+	  priorities for retention/retained memory drivers).
+
 config STM32_ENABLE_DEBUG_SLEEP_STOP
 	bool "Allow debugger attach in stop/sleep Mode"
 	help

soc/st/stm32/Kconfig.defconfig

@@ -81,6 +81,16 @@ config CLOCK_CONTROL_INIT_PRIORITY
 	default 1
 	depends on CLOCK_CONTROL
 
+if STM32_BOOTLOADER
+
+config RETAINED_MEM_INIT_PRIORITY
+	default 1
+
+config RETENTION_INIT_PRIORITY
+	default 2
+
+endif
+
 # Get flash configuration for NS image from dts flash partition
 config USE_DT_CODE_PARTITION
 	default y if TRUSTED_EXECUTION_NONSECURE

soc/st/stm32/common/CMakeLists.txt

@@ -19,6 +19,8 @@ endif()
 zephyr_sources_ifdef(CONFIG_STM32_BACKUP_SRAM stm32_backup_sram.c)
 zephyr_linker_sources_ifdef(CONFIG_STM32_BACKUP_SRAM SECTIONS stm32_backup_sram.ld)
 
+zephyr_sources_ifdef(CONFIG_STM32_BOOTLOADER stm32_bootloader.c)
+
 if (NOT CONFIG_DEBUG AND CONFIG_PM)
   zephyr_sources_ifdef(CONFIG_DT_HAS_SWJ_CONNECTOR_ENABLED pm_debug_swj.c)
 endif()

soc/st/stm32/common/stm32_bootloader.c

@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2020 Google LLC.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <zephyr/init.h>
+#include <zephyr/retention/retention.h>
+#include <zephyr/retention/bootmode.h>
+#include <stm32_ll_system.h>
+
+#if defined(CONFIG_ARM_MPU)
+extern void arm_core_mpu_disable(void);
+#endif
+
+static const uint32_t bootloader = DT_REG_ADDR(DT_INST(0, st_stm32_bootloader));
+static FUNC_NORETURN void jump_to_bootloader(void)
+{
+	int i;
+	void (*jmp)(void);
+
+	__disable_irq();
+
+	for (i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
+		NVIC->ICER[i] = 0xFFFFFFFF;
+		NVIC->ICPR[i] = 0xFFFFFFFF;
+	}
+
+#if defined(CONFIG_ARM_MPU)
+	/*
+	 * Needed to allow the bootloader to erase/write to flash, and the MPU
+	 * is set up in the arch init phase.
+	 */
+	arm_core_mpu_disable();
+#endif
+
+	/*
+	 * Disable SysTick before jumping, to keep the bootloader happy
+	 */
+	SysTick->CTRL = 0;
+
+	LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SYSTEMFLASH);
+
+	jmp = (void (*)(void))(void (*)(void))(*((uint32_t *)((bootloader + 4))));
+
+	/*
+	 * We need to clear a few things set by the Zephyr early startup code
+	 */
+	__set_CONTROL(0);
+#if !defined(CONFIG_CPU_CORTEX_M0)
+	__set_BASEPRI(0);
+#endif
+
+	__set_MSP(*(uint32_t *)bootloader);
+
+	__enable_irq();
+
+	jmp();
+
+	CODE_UNREACHABLE;
+}
+
+static int bootloader_check_boot_init(void)
+{
+	if (bootmode_check(BOOT_MODE_TYPE_BOOTLOADER) > 0) {
+		bootmode_clear();
+		jump_to_bootloader();
+	}
+
+	return 0;
+}
+
+SYS_INIT(bootloader_check_boot_init, POST_KERNEL, CONFIG_STM32_BOOTLOADER_INIT_PRIORITY);