samples: boards: stm32 octo-spi_flash in MemoryMapped mode

FRASTM · FRASTM · commit 7517710cb339 · 2024-01-29T18:05:35.000+01:00
Sample to configure the octo/quad external Flash in memory Mapped mode
so that read is accessible in memecopy
Write too even if not recommended.

Signed-off-by: Francois Ramu &lt;francois.ramu@st.com&gt;
diff --git a/samples/boards/stm32/spi_flash/CMakeLists.txt b/samples/boards/stm32/spi_flash/CMakeLists.txt
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(spi_flash)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})
diff --git a/samples/boards/stm32/spi_flash/README.rst b/samples/boards/stm32/spi_flash/README.rst
@@ -0,0 +1,42 @@
+.. zephyr:code-sample:: spi-nor
+   :name: JEDEC SPI-NOR flash
+   :relevant-api: flash_interface
+
+   Use the flash API to interact with an SPI NOR serial flash memory device.
+
+Overview
+********
+
+This sample demonstrates using the :ref:`flash API <flash_api>` on a SPI NOR serial flash
+memory device.  While trivial it is an example of direct access and
+allows confirmation that the flash is working and that automatic power
+savings is correctly implemented.
+
+Building and Running
+********************
+
+The application will build only for a target that has a :ref:`devicetree
+<dt-guide>` entry with ``jedec,spi-nor`` as a compatible.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/drivers/spi_flash
+   :board: nrf52840dk_nrf52840
+   :goals: build flash
+   :compact:
+
+Sample Output
+=============
+
+.. code-block:: console
+
+   *** Booting Zephyr OS build zephyr-v2.3.0-2142-gca01d2e1d748  ***
+
+   JEDEC QSPI-NOR SPI flash testing
+   ==========================
+
+   Test 1: Flash erase
+   Flash erase succeeded!
+
+   Test 2: Flash write
+   Attempting to write 4 bytes
+   Data read matches data written. Good!
diff --git a/samples/boards/stm32/spi_flash/boards/b_u585i_iot02a.conf b/samples/boards/stm32/spi_flash/boards/b_u585i_iot02a.conf
@@ -0,0 +1,4 @@
+#CONFIG_LOG=y
+#CONFIG_FLASH_LOG_LEVEL_DBG=y
+CONFIG_STM32_MEMMAP=y
+
diff --git a/samples/boards/stm32/spi_flash/boards/b_u585i_iot02a.overlay b/samples/boards/stm32/spi_flash/boards/b_u585i_iot02a.overlay
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2022 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&octospi2 {
+            /* channel 12-15 are for transfers to/from external memories */
+ /*           dmas = <&gpdma1 12 41 0x10480>; /* request 41 for OCTOSPI2 */
+/*            dma-names = "tx_rx";*/
+};
diff --git a/samples/boards/stm32/spi_flash/boards/stm32h735g_disco.conf b/samples/boards/stm32/spi_flash/boards/stm32h735g_disco.conf
@@ -0,0 +1 @@
+CONFIG_SPI=n
diff --git a/samples/boards/stm32/spi_flash/boards/stm32h735g_disco.overlay b/samples/boards/stm32/spi_flash/boards/stm32h735g_disco.overlay
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2022 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&octospi1 {
+            dmas = <&dma1 1 0x16 0x480>; /* request for OCTOSPI1 fifo THreshold */
+            dma-names = "tx_rx";
+};
+
+&mdma {
+	status = "okay";
+};
diff --git a/samples/boards/stm32/spi_flash/boards/stm32h7b3i_dk.conf b/samples/boards/stm32/spi_flash/boards/stm32h7b3i_dk.conf
@@ -0,0 +1 @@
+CONFIG_SPI=n
diff --git a/samples/boards/stm32/spi_flash/boards/stm32l562e_dk.overlay b/samples/boards/stm32/spi_flash/boards/stm32l562e_dk.overlay
@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2022 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&octospi1 {
+            dmas = <&dma1 0 41 0x480>; /* request 41 for OCTOSPI1 */
+            dma-names = "tx_rx";
+};
+
+&dma1 {
+	status = "okay";
+};
+
+&dma2 {
+	status = "okay";
+};
+
+&dmamux1 {
+	status = "okay";
+};
diff --git a/samples/boards/stm32/spi_flash/prj.conf b/samples/boards/stm32/spi_flash/prj.conf
@@ -0,0 +1,3 @@
+CONFIG_STDOUT_CONSOLE=y
+CONFIG_FLASH=y
+CONFIG_SPI=y
diff --git a/samples/boards/stm32/spi_flash/sample.yaml b/samples/boards/stm32/spi_flash/sample.yaml
@@ -0,0 +1,31 @@
+sample:
+  name: SPI Flash Sample
+tests:
+  sample.drivers.spi.flash:
+    tags:
+      - spi
+      - flash
+    filter: dt_compat_enabled("jedec,spi-nor") or dt_compat_enabled("st,stm32-qspi-nor")
+      or dt_compat_enabled("st,stm32-ospi-nor")
+    platform_exclude: hifive_unmatched
+    harness: console
+    harness_config:
+      type: multi_line
+      ordered: true
+      regex:
+        - "Test 1: Flash erase"
+        - "Flash erase succeeded!"
+        - "Test 2: Flash write"
+        - "Attempting to write 4 bytes"
+        - "Data read matches data written. Good!!"
+    depends_on: spi
+  sample.drivers.spi.flash_dpd:
+    tags:
+      - spi
+      - flash
+    filter: dt_compat_enabled("jedec,spi-nor")
+    platform_exclude: hifive_unmatched
+    build_only: true
+    extra_configs:
+      - CONFIG_SPI_NOR_IDLE_IN_DPD=y
+    depends_on: spi
diff --git a/samples/boards/stm32/spi_flash/src/main.c b/samples/boards/stm32/spi_flash/src/main.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (c) 2016 Intel Corporation.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/kernel.h>
+#include <zephyr/drivers/flash.h>
+#include <zephyr/device.h>
+#include <zephyr/devicetree.h>
+#include <stdio.h>
+#include <string.h>
+
+#define SPI_FLASH_TEST_REGION_OFFSET 0
+#define SPI_FLASH_TEST_REGION_OFFSET_1 0x1000
+#define SPI_FLASH_SECTOR_SIZE        4096
+
+#if defined(CONFIG_FLASH_STM32_OSPI) || defined(CONFIG_FLASH_STM32_QSPI)
+#define SPI_FLASH_MULTI_SECTOR_TEST
+#endif
+
+void single_sector_test(const struct device *flash_dev)
+{
+	const uint8_t expected[] = { 0x55, 0xaa, 0x66, 0x99 };
+	const size_t len = sizeof(expected);
+	uint8_t buf[sizeof(expected)];
+	int rc;
+
+	printf("\nPerform test on single sector");
+	/* Write protection needs to be disabled before each write or
+	 * erase, since the flash component turns on write protection
+	 * automatically after completion of write and erase
+	 * operations.
+	 */
+	printf("\nTest 1: Flash erase\n");
+
+	/* Full flash erase if SPI_FLASH_TEST_REGION_OFFSET = 0 and
+	 * SPI_FLASH_SECTOR_SIZE = flash size
+	 */
+	rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET,
+			 SPI_FLASH_SECTOR_SIZE);
+	if (rc != 0) {
+		printf("Flash erase failed! %d\n", rc);
+	} else {
+		printf("Flash erase succeeded!\n");
+	}
+
+	printf("\nTest 2: Flash write\n");
+
+	printf("Attempting to write %zu bytes\n", len);
+	rc = flash_write(flash_dev, SPI_FLASH_TEST_REGION_OFFSET, expected, len);
+	if (rc != 0) {
+		printf("Flash write failed! %d\n", rc);
+		return;
+	}
+
+	memset(buf, 0, len);
+	rc = flash_read(flash_dev, SPI_FLASH_TEST_REGION_OFFSET, buf, len);
+	if (rc != 0) {
+		printf("Flash read failed! %d\n", rc);
+		return;
+	}
+
+	if (memcmp(expected, buf, len) == 0) {
+		printf("Data read matches data written. Good!!\n");
+	} else {
+		const uint8_t *wp = expected;
+		const uint8_t *rp = buf;
+		const uint8_t *rpe = rp + len;
+
+		printf("Data read does not match data written!!\n");
+		while (rp < rpe) {
+			printf("%08x wrote %02x read %02x %s\n",
+			       (uint32_t)(SPI_FLASH_TEST_REGION_OFFSET + (rp - buf)),
+			       *wp, *rp, (*rp == *wp) ? "match" : "MISMATCH");
+			++rp;
+			++wp;
+		}
+	}
+}
+
+#if defined SPI_FLASH_MULTI_SECTOR_TEST
+void multi_sector_test(const struct device *flash_dev)
+{
+	const uint8_t expected[] = { 0x55, 0xaa, 0x66, 0x99 };
+	const size_t len = sizeof(expected);
+	uint8_t buf[sizeof(expected)];
+	int rc;
+
+	printf("\nPerform test on multiple consecutive sectors");
+
+	/* Write protection needs to be disabled before each write or
+	 * erase, since the flash component turns on write protection
+	 * automatically after completion of write and erase
+	 * operations.
+	 */
+	printf("\nTest 1: Flash erase\n");
+
+	/* Full flash erase if SPI_FLASH_TEST_REGION_OFFSET_1 = 0 and
+	 * SPI_FLASH_SECTOR_SIZE = flash size
+	 * Erase 2 sectors for check for erase of consequtive sectors
+	 */
+	rc = flash_erase(flash_dev, SPI_FLASH_TEST_REGION_OFFSET_1, SPI_FLASH_SECTOR_SIZE * 2);
+	if (rc != 0) {
+		printf("Flash erase failed! %d\n", rc);
+	} else {
+		/* Read the content and check for erased */
+		memset(buf, 0, len);
+		size_t offs = SPI_FLASH_TEST_REGION_OFFSET_1;
+
+		while (offs < SPI_FLASH_TEST_REGION_OFFSET_1 + 2 * SPI_FLASH_SECTOR_SIZE) {
+			rc = flash_read(flash_dev, offs, buf, len);
+			if (rc != 0) {
+				printf("Flash read failed! %d\n", rc);
+				return;
+			}
+			if (buf[0] != 0xff) {
+				printf("Flash erase failed at offset 0x%x got 0x%x\n",
+				offs, buf[0]);
+				return;
+			}
+			offs += SPI_FLASH_SECTOR_SIZE;
+		}
+		printf("Flash erase succeeded!\n");
+	}
+
+	printf("\nTest 2: Flash write\n");
+
+	size_t offs = SPI_FLASH_TEST_REGION_OFFSET_1;
+
+	while (offs < SPI_FLASH_TEST_REGION_OFFSET_1 + 2 * SPI_FLASH_SECTOR_SIZE) {
+		printf("Attempting to write %zu bytes at offset 0x%x\n", len, offs);
+		rc = flash_write(flash_dev, offs, expected, len);
+		if (rc != 0) {
+			printf("Flash write failed! %d\n", rc);
+			return;
+		}
+
+		memset(buf, 0, len);
+		rc = flash_read(flash_dev, offs, buf, len);
+		if (rc != 0) {
+			printf("Flash read failed! %d\n", rc);
+			return;
+		}
+
+		if (memcmp(expected, buf, len) == 0) {
+			printf("Data read matches data written. Good!!\n");
+		} else {
+			const uint8_t *wp = expected;
+			const uint8_t *rp = buf;
+			const uint8_t *rpe = rp + len;
+
+			printf("Data read does not match data written!!\n");
+			while (rp < rpe) {
+				printf("%08x wrote %02x read %02x %s\n",
+					(uint32_t)(offs + (rp - buf)),
+					*wp, *rp, (*rp == *wp) ? "match" : "MISMATCH");
+				++rp;
+				++wp;
+			}
+		}
+		offs += SPI_FLASH_SECTOR_SIZE;
+	}
+}
+#endif
+
+int main(void)
+{
+	const struct device *flash_dev = DEVICE_DT_GET(DT_ALIAS(spi_flash0));
+
+	if (!device_is_ready(flash_dev)) {
+		printk("%s: device not ready.\n", flash_dev->name);
+		return 0;
+	}
+
+	printf("\n%s SPI flash testing\n", flash_dev->name);
+	printf("==========================\n");
+
+	single_sector_test(flash_dev);
+
+#if defined SPI_FLASH_MULTI_SECTOR_TEST
+	multi_sector_test(flash_dev);
+#endif
+	return 0;
+}

Original file line number	Diff line number	Diff line change
`@@ -0,0 +1,3 @@`
	`1`	`+CONFIG_STDOUT_CONSOLE=y`
	`2`	`+CONFIG_FLASH=y`
	`3`	`+CONFIG_SPI=y`