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soc: reapply soc mpu code for 20829 platform
- mpu code in soc.c for 20829 platform was accidentally removed in a recent PR. This is its reapplication Signed-off-by: McAtee Maxwell <[email protected]>
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soc/infineon/cat1b/cyw20829/soc.c

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@@ -54,8 +54,43 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t *config, cy_israddres
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return(status);
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}
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/*
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* This function will allow execute from sram region. This is needed only for
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* this sample because by default all soc will disable the execute from SRAM.
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* An application that requires that the code be executed from SRAM will have
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* to configure the region appropriately in arm_mpu_regions.c.
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*/
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#ifdef CONFIG_ARM_MPU
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#include <cmsis_core.h>
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void disable_mpu_rasr_xn(void)
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{
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uint32_t index;
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/*
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* Kept the max index as 8(irrespective of soc) because the sram would
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* most likely be set at index 2.
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*/
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for (index = 0U; index < 8; index++) {
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MPU->RNR = index;
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#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
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if (MPU->RBAR & MPU_RBAR_XN_Msk) {
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MPU->RBAR ^= MPU_RBAR_XN_Msk;
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}
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#else
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if (MPU->RASR & MPU_RASR_XN_Msk) {
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MPU->RASR ^= MPU_RASR_XN_Msk;
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}
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#endif /* CONFIG_ARMV8_M_BASELINE || CONFIG_ARMV8_M_MAINLINE */
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}
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}
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#endif /* CONFIG_ARM_MPU */
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void soc_early_init_hook(void)
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{
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#ifdef CONFIG_ARM_MPU
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disable_mpu_rasr_xn();
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#endif /* CONFIG_ARM_MPU */
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/* Initializes the system */
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SystemInit();
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