drivers: flash: stm32 xspi driver to read and write in memmapped mode

Configure the stm32 xspi flash for reading and writing in memorymapped
The sequence is from the STM32Cube.
mode. The external NOR flash must be erased (in indirect mode)
before writing.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

drivers/flash/flash_stm32_xspi.c

@@ -839,7 +839,7 @@ static int stm32_xspi_mem_reset(const struct device *dev)
 }
 
 #ifdef CONFIG_STM32_MEMMAP
-/* Function to configure the octoflash in MemoryMapped mode */
+/* Function to configure the octoflash in MemoryMapped mode for writing and reading */
 static int stm32_xspi_set_memorymap(const struct device *dev)
 {
 	HAL_StatusTypeDef ret;
@@ -855,9 +855,26 @@ static int stm32_xspi_set_memorymap(const struct device *dev)
 		LOG_ERR("XSPI_SPI_MODE in 3Bytes addressing is not supported");
 		return -EIO;
 	}
+	/* Enable write operation */
+	ret = stm32_xspi_write_enable(dev,
+		dev_cfg->data_mode, dev_cfg->data_rate);
+	if (ret != 0) {
+	LOG_ERR("XSPI: write not enabled");
+	return ret;
+	}
 
-	/* Initialize the read command */
-	s_command.OperationType = HAL_XSPI_OPTYPE_READ_CFG;
+	/* Initialize the program command */
+	s_command.OperationType = HAL_XSPI_OPTYPE_WRITE_CFG;
+	if (dev_cfg->data_rate == XSPI_STR_TRANSFER) {
+		s_command.Instruction = (dev_cfg->data_mode == XSPI_SPI_MODE)
+					? ((stm32_xspi_hal_address_size(dev) ==
+					HAL_XSPI_ADDRESS_24_BITS)
+						? SPI_NOR_CMD_PP
+						: SPI_NOR_CMD_PP_4B)
+					: SPI_NOR_OCMD_PAGE_PRG;
+	} else {
+		s_command.Instruction = SPI_NOR_OCMD_PAGE_PRG;
+	}
 	s_command.InstructionMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
 					? HAL_XSPI_INSTRUCTION_1_LINE
@@ -871,14 +888,6 @@ static int stm32_xspi_set_memorymap(const struct device *dev)
 					? HAL_XSPI_INSTRUCTION_8_BITS
 					: HAL_XSPI_INSTRUCTION_16_BITS)
 				: HAL_XSPI_INSTRUCTION_16_BITS;
-	s_command.Instruction = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
-				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
-					? ((stm32_xspi_hal_address_size(dev) ==
-					HAL_XSPI_ADDRESS_24_BITS)
-						? SPI_NOR_CMD_READ_FAST
-						: SPI_NOR_CMD_READ_FAST_4B)
-					: dev_data->read_opcode)
-				: SPI_NOR_OCMD_DTR_RD;
 	s_command.AddressMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
 					? HAL_XSPI_ADDRESS_1_LINE
@@ -898,11 +907,6 @@ static int stm32_xspi_set_memorymap(const struct device *dev)
 	s_command.DataDTRMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
 				? HAL_XSPI_DATA_DTR_DISABLE
 				: HAL_XSPI_DATA_DTR_ENABLE;
-	s_command.DummyCycles = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
-				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
-					? SPI_NOR_DUMMY_RD
-					: SPI_NOR_DUMMY_RD_OCTAL)
-				: SPI_NOR_DUMMY_RD_OCTAL_DTR;
 	s_command.DQSMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
 				? HAL_XSPI_DQS_DISABLE
 				: HAL_XSPI_DQS_ENABLE;
@@ -912,40 +916,44 @@ static int stm32_xspi_set_memorymap(const struct device *dev)
 
 	ret = HAL_XSPI_Command(&dev_data->hxspi, &s_command, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);
 	if (ret != HAL_OK) {
-		LOG_ERR("%d: Failed to set memory map", ret);
+		LOG_ERR("%d: Failed to set memory map wr", ret);
 		return -EIO;
 	}
 
-	/* Initialize the program command */
-	s_command.OperationType = HAL_XSPI_OPTYPE_WRITE_CFG;
-	if (dev_cfg->data_rate == XSPI_STR_TRANSFER) {
-		s_command.Instruction = (dev_cfg->data_mode == XSPI_SPI_MODE)
+	/* Initialize the read command */
+	s_command.OperationType = HAL_XSPI_OPTYPE_READ_CFG;
+	s_command.Instruction = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
+				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
 					? ((stm32_xspi_hal_address_size(dev) ==
 					HAL_XSPI_ADDRESS_24_BITS)
-						? SPI_NOR_CMD_PP
-						: SPI_NOR_CMD_PP_4B)
-					: SPI_NOR_OCMD_PAGE_PRG;
-	} else {
-		s_command.Instruction = SPI_NOR_OCMD_PAGE_PRG;
-	}
+						? SPI_NOR_CMD_READ_FAST
+						: SPI_NOR_CMD_READ_FAST_4B)
+					: dev_data->read_opcode)
+				: SPI_NOR_OCMD_DTR_RD;
+	s_command.DummyCycles = (dev_cfg->data_rate == XSPI_STR_TRANSFER)
+				? ((dev_cfg->data_mode == XSPI_SPI_MODE)
+					? SPI_NOR_DUMMY_RD
+					: SPI_NOR_DUMMY_RD_OCTAL)
+				: SPI_NOR_DUMMY_RD_OCTAL_DTR;
 	s_command.DQSMode = HAL_XSPI_DQS_DISABLE;
 
 	ret = HAL_XSPI_Command(&dev_data->hxspi, &s_command, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);
 	if (ret != HAL_OK) {
-		LOG_ERR("%d: Failed to set memory mapped", ret);
+		LOG_ERR("%d: Failed to set memory map rd", ret);
 		return -EIO;
 	}
 
 	/* Enable the memory-mapping */
-	s_MemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_DISABLE;
-
+	s_MemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_ENABLE;
+	s_MemMappedCfg.TimeoutPeriodClock = 0x50;
 	ret = HAL_XSPI_MemoryMapped(&dev_data->hxspi, &s_MemMappedCfg);
 	if (ret != HAL_OK) {
-		LOG_ERR("%d: Failed to enable memory mapped", ret);
+		LOG_ERR("%d: Failed to set memory map", ret);
 		return -EIO;
 	}
 
-	LOG_DBG("MemoryMap mode enabled");
+	LOG_INF("MemoryMap mode enabled");
+
 	return 0;
 }
 
@@ -1187,7 +1195,7 @@ static int flash_stm32_xspi_read(const struct device *dev, off_t addr,
 
 	uintptr_t mmap_addr = STM32_XSPI_BASE_ADDRESS + addr;
 
-	LOG_DBG("Memory-mapped read from 0x%08lx, len %zu", mmap_addr, size);
+	LOG_INF("Memory-mapped read from 0x%08lx, len %zu", mmap_addr, size);
 	memcpy(data, (void *)mmap_addr, size);
 	ret = 0;
 	goto read_end;
@@ -1290,15 +1298,31 @@ static int flash_stm32_xspi_write(const struct device *dev, off_t addr,
 #ifdef CONFIG_STM32_MEMMAP
 	ARG_UNUSED(dev_data);
 
-	if (stm32_xspi_is_memorymap(dev)) {
-		/* Abort ongoing transfer to force CS high/BUSY deasserted */
-		ret = stm32_xspi_abort(dev);
+	/* Do writes through memory-mapping instead of indirect */
+	if (!stm32_xspi_is_memorymap(dev)) {
+		ret = stm32_xspi_set_memorymap(dev);
 		if (ret != 0) {
-			LOG_ERR("Failed to abort memory-mapped access before write");
+			LOG_ERR("WRITE: failed to set memory mapped");
 			goto write_end;
 		}
 	}
-#endif
+	__ASSERT_NO_MSG(stm32_xspi_is_memorymap(dev));
+
+	uintptr_t mmap_addr = STM32_XSPI_BASE_ADDRESS + addr;
+
+	LOG_INF("Memory-mapped write from 0x%08lx, len %zu", mmap_addr, size);
+	memcpy((void *)mmap_addr, data, size);
+	ret = 0;
+
+	/*
+	* In memory-mapped mode, not possible to check if the memory is ready
+	* after the programming. So a delay corresponding to max page programming
+	* time is added */
+	k_busy_wait(HAL_XSPI_TIMEOUT_DEFAULT_VALUE);
+	goto write_end;
+ 
+#endif /* CONFIG_STM32_MEMMAP */
+
 	/* page program for STR or DTR mode */
 	XSPI_RegularCmdTypeDef cmd_pp = xspi_prepare_cmd(dev_cfg->data_mode, dev_cfg->data_rate);