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This commit adds the I3C handling of open-drain
timing configurations with the following changes:
- Add scl_od_min structure to i3c_config_controller for
high/low period settings
- Define Open-drain mixed bus SCL timing constants
Requirement (MIPI Specification for I3C Basic v1.2 (16-Dec-2024),
Section 4.3.11.2 & Table 49):
- The MIPI I3C specification mandates different open-drain speeds during
bus initialization as defined in
"I3C Basic Open Drain Timing Parameters".
- The first broadcast address (7'h7E+W) must be transmitted at a slower
open-drain speed to ensure visibility to all devices on the I3C bus,
including legacy I2C devices. This slow speed (minimum 200ns Thigh)
allows I2C devices to properly detect the I3C mode transition and
disable their spike filters before switching to I3C mode. After the
initial broadcast, normal I3C open-drain speeds can be used for
regular operation.
Signed-off-by: Shreehari HK <[email protected]>
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