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dts: arm: st: add comparator to h7 and g4
adds comparator DTS entities for stm32h7 and stm32g4 series Signed-off-by: Alexander Kozhinov <[email protected]>
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dts/arm/st/g4/stm32g4.dtsi

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/*
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* Copyright (c) 2021 The Chromium OS Authors
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* Copyright (c) 2019 Richard Osterloh <[email protected]>
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* Copyright (c) 2024 Alexander Kozhinov <[email protected]>
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* Copyright (c) 2024 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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interrupts = <63 0>;
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status = "disabled";
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};
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comp1: comparator@40010200 {
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compatible = "st,stm32-comp";
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reg = <0x40010200 0x4>;
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interrupts = <64 0>;
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st,exti-line = <21>;
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hysteresis = "NONE";
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st,blank-sel = "NONE";
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positive-input = "IN0";
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negative-input = "VREFINT";
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invert-output = "NONINVERTED";
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clocks = <&rcc STM32_CLOCK(APB2, 0U)>;
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status = "disabled";
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};
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comp2: comparator@40010204 {
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compatible = "st,stm32-comp";
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reg = <0x40010204 0x4>;
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interrupts = <64 0>;
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st,exti-line = <22>;
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hysteresis = "NONE";
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st,blank-sel = "NONE";
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positive-input = "IN0";
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negative-input = "VREFINT";
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invert-output = "NONINVERTED";
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clocks = <&rcc STM32_CLOCK(APB2, 0U)>;
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status = "disabled";
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};
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};
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die_temp: dietemp {

dts/arm/st/h7/stm32h7.dtsi

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STM32_DMA_16BITS) 0>;
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status = "disabled";
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};
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comp1_ch1: comparator@5800380c {
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compatible = "st,stm32-comp", "st,stm32h7-comp";
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reg = <0x5800380c 0x200>;
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interrupts = <137 0>;
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st,exti-line = <20>;
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st,blank-sel = "NONE";
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st,power-mode = "MEDIUMSPEED";
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hysteresis = "NONE";
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positive-input = "IN0";
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negative-input = "VREFINT";
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invert-output = "NONINVERTED";
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clocks = <&rcc STM32_CLOCK(APB4, 14U)>;
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status = "disabled";
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};
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comp1_ch2: comparator@58003810 {
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compatible = "st,stm32-comp", "st,stm32h7-comp";
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reg = <0x58003810 0x200>;
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interrupts = <137 0>;
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st,exti-line = <20>;
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st,blank-sel = "NONE";
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st,power-mode = "MEDIUMSPEED";
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hysteresis = "NONE";
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positive-input = "IN0";
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negative-input = "VREFINT";
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invert-output = "NONINVERTED";
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clocks = <&rcc STM32_CLOCK(APB4, 14U)>;
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status = "disabled";
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};
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};
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die_temp: dietemp {

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