boards: nxp: Move board specific files from hal to zephyr

Move board specific files (dcd, flash_config, etc.) from
nxp hal repo to zephyr repo.

Signed-off-by: Zhaoxiang Jin <[email protected]>

Author: ZhaoxiangJin

boards/nxp/frdm_mcxn947/CMakeLists.txt

@@ -10,7 +10,6 @@ zephyr_library_sources(board.c)
 if(CONFIG_FLEXSPI_CONFIG_BLOCK_OFFSET)
   # Include flash configuration block
   zephyr_compile_definitions(XIP_BOOT_HEADER_ENABLE=1)
-  set(BOARD_DIR "${ZEPHYR_HAL_NXP_MODULE_DIR}/mcux/mcux-sdk-ng/boards/frdmmcxn947")
-  zephyr_library_sources(${BOARD_DIR}/xip/mcxn_flexspi_nor_config.c)
-  zephyr_library_include_directories(${BOARD_DIR}/xip)
+  zephyr_library_sources(xip/mcxn_flexspi_nor_config.c)
+  zephyr_library_include_directories(xip)
 endif()

boards/nxp/frdm_mcxn947/xip/mcxn_flexspi_nor_config.c

@@ -0,0 +1,150 @@
+/*
+ * Copyright 2018-2022 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "mcxn_flexspi_nor_config.h"
+
+/* Component ID definition, used by tools. */
+#ifndef FSL_COMPONENT_ID
+#define FSL_COMPONENT_ID "platform.drivers.xip_board"
+#endif
+
+#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+__attribute__((section(".flexspi_fcb"), used))
+#elif defined(__ICCARM__)
+#pragma location = ".flexspi_fcb"
+#endif
+
+#ifndef FLEXSPI_USE_CUSTOM_FCB
+#define FLEXSPI_USE_CUSTOM_FCB (0)
+#endif
+
+#if FLEXSPI_USE_CUSTOM_FCB
+/* FCB for W25Q64 */
+const uint8_t CUSTOM_FCB[] = {
+	0x46, 0x43, 0x46, 0x42, 0x00, 0x04, 0x01, 0x56, 0x00, 0x00, 0x00,
+	0x00, 0x01, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,	0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
+	0x00, 0x00, 0x01, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb, 0x04, 0x18, 0x0a,
+	0x06, 0x32, 0x04, 0x26, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x05, 0x04, 0x04, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x06, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
+	0x04, 0x18, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0xd8, 0x04, 0x18, 0x08, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x18,
+	0x08, 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x04, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
+	0x00, 0x00, 0x10, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+};
+#else
+
+/* FCB for W25Q64 */
+const flexspi_nor_image_config image_config = {
+	.image_version = 0xFFFE0001u,
+	.fcb_config = {
+		.memConfig = {
+			.tag = FLEXSPI_CFG_BLK_TAG,
+			.version = FLEXSPI_CFG_BLK_VERSION,
+			.readSampleClkSrc =
+				kFlexSPIReadSampleClk_LoopbackFromDqsPad,
+			.csHoldTime = 3u,
+			.csSetupTime = 3u,
+			/* Enable DDR mode, Wordaddassable, Safe */
+			/* configuration, Differential clock */
+			.controllerMiscOption =
+			(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable),
+			.deviceType = kFlexSpiDeviceType_SerialNOR,
+			.sflashPadType = kSerialFlash_4Pads,
+			.serialClkFreq = kFlexSpiSerialClk_75MHz,
+			.sflashA1Size = 8u * 1024u * 1024u,
+			.lookupTable = {
+				/* Read LUTs */
+				[0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0xEB,
+					RADDR_SDR, FLEXSPI_4PAD,
+					0x18),
+				[1] = FLEXSPI_LUT_SEQ(DUMMY_SDR,
+					FLEXSPI_4PAD, 0x06,
+					READ_SDR, FLEXSPI_4PAD,
+					0x04),
+
+				/* Read Status LUTs */
+				[4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0x05, READ_SDR,
+					FLEXSPI_1PAD, 0x04),
+
+				/* Write Enable LUTs */
+				[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0x06, STOP,
+					FLEXSPI_1PAD, 0x0),
+
+				/* Erase Sector LUTs */
+				[4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0x20, RADDR_SDR,
+					FLEXSPI_1PAD, 0x18),
+
+				/* Erase Block LUTs */
+				[4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0xD8, RADDR_SDR,
+					FLEXSPI_1PAD, 0x18),
+
+				/* Pape Program LUTs */
+				[4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0x02, RADDR_SDR,
+					FLEXSPI_1PAD, 0x18),
+				[4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR,
+					FLEXSPI_1PAD, 0x04, STOP,
+					FLEXSPI_1PAD, 0x0),
+
+				/* Erase Chip LUTs */
+				[4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR,
+					FLEXSPI_1PAD, 0x60, STOP,
+					FLEXSPI_1PAD, 0x0),
+			},
+		},
+		.pageSize = 256u,
+		.sectorSize = 4u * 1024u,
+		.ipcmdSerialClkFreq = 1u,
+		.blockSize = 64u * 1024u,
+		.isUniformBlockSize = false,
+	}
+};
+
+#endif