boards: nxp: convert lpcxpresso55s69 to hwmv2

Convert lpcxpresso55s69

Signed-off-by: David Leach <[email protected]>

Author: dleach02

boards/boards_legacy/arm/lpcxpresso55s69/Kconfig.board

@@ -1,4 +1,6 @@
 # Copyright (c) 2020, Seagate
+# Copyright 2024 NXP
+#
 # SPDX-License-Identifier: Apache-2.0
 
 config BOARD_LPCXPRESSO11U68

boards/boards_legacy/arm/lpcxpresso55s69/board.cmake

@@ -1,13 +1,7 @@
-# LPCXpresso55S69 board
-
-# Copyright (c) 2019, NXP
+# Copyright 2019,2024 NXP
 # SPDX-License-Identifier: Apache-2.0
 
-if BOARD_LPCXPRESSO55S69_CPU0 || BOARD_LPCXPRESSO55S69_CPU1
-
-config BOARD
-	default "lpcxpresso55S69_cpu0" if BOARD_LPCXPRESSO55S69_CPU0
-	default "lpcxpresso55S69_cpu1" if BOARD_LPCXPRESSO55S69_CPU1
+if BOARD_LPCXPRESSO55S69
 
 if FXOS8700
 
@@ -36,9 +30,9 @@ DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
 
 config FLASH_LOAD_SIZE
 	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
-	depends on BOARD_LPCXPRESSO55S69_CPU0 && TRUSTED_EXECUTION_SECURE
+	depends on BOARD_LPCXPRESSO55S69_LPC55S69_CPU0 && TRUSTED_EXECUTION_SECURE
 
-if TRUSTED_EXECUTION_NONSECURE || BOARD_LPCXPRESSO55S69_CPU1
+if TRUSTED_EXECUTION_NONSECURE || BOARD_LPCXPRESSO55S69_LPC55S69_CPU1
 
 config FLASH_LOAD_OFFSET
 	default 0x50000 if (!TFM_BL2 && BUILD_WITH_TFM)
@@ -48,7 +42,7 @@ config FLASH_LOAD_SIZE
 	default 0x40000 if (!TFM_BL2 && BUILD_WITH_TFM)
 	default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
 
-endif # TRUSTED_EXECUTION_NONSECURE || BOARD_LPCXPRESSO55S69_CPU1
+endif # TRUSTED_EXECUTION_NONSECURE || BOARD_LPCXPRESSO55S69_LPC55S69_CPU1
 
 choice TFM_PROFILE_TYPE
 	depends on BUILD_WITH_TFM
@@ -62,4 +56,4 @@ choice MCUBOOT_BOOTLOADER_MODE
 endchoice
 endif #BOOTLOADER_MCUBOOT
 
-endif # BOARD_LPCXPRESSO55S69_CPU0 || BOARD_LPCXPRESSO55S69_CPU1
+endif # BOARD_LPCXPRESSO55S69

boards/boards_legacy/arm/lpcxpresso55s69/lpcxpresso55s69_cpu1_defconfig

@@ -0,0 +1,8 @@
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_LPCXPRESSO55S69
+	select SOC_LPC55S69_CPU0 if BOARD_LPCXPRESSO55S69_LPC55S69_CPU0 ||	\
+								BOARD_LPCXPRESSO55S69_LPC55S69_CPU0_NS
+	select SOC_LPC55S69_CPU1 if BOARD_LPCXPRESSO55S69_LPC55S69_CPU1
+	select SOC_PART_NUMBER_LPC55S69JBD100

boards/nxp/lpcxpresso11u68/Kconfig.lpcxpresso11u68

@@ -0,0 +1,30 @@
+#
+# Copyright 2019, 2023 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+
+## DAP Link implementation in pyocd is underway,
+## until then jlink can be used or copy image to storage
+
+if(CONFIG_BOARD_LPCXPRESSO55S69_LPC55S69_CPU0 OR
+   CONFIG_BOARD_LPCXPRESSO55S69_LPC55S69_CPU0_NS OR
+   CONFIG_SECOND_CORE_MCUX)
+  board_runner_args(jlink "--device=LPC55S69_M33_0")
+  board_runner_args(linkserver  "--device=LPC55S69:LPCXpresso55S69")
+  board_runner_args(linkserver  "--override=/device/memory/0/flash-driver=LPC55xx_S.cfx")
+  board_runner_args(linkserver  "--override=/device/memory/0/location=0x10000000")
+elseif(CONFIG_BOARD_LPCXPRESSO55S69_LPC55S69_CPU1)
+  board_runner_args(jlink "--device=LPC55S69_M33_1")
+endif()
+
+board_runner_args(pyocd "--target=lpc55s69")
+
+if(CONFIG_BUILD_WITH_TFM)
+  set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
+endif()
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)

boards/boards_legacy/arm/lpcxpresso55s69/CMakeLists.txt renamed to boards/nxp/lpcxpresso55s69/CMakeLists.txt

@@ -0,0 +1,8 @@
+board:
+  name: lpcxpresso55s69
+  vendor: nxp
+  socs:
+  - name: lpc55s69
+    variants:
+    - name: "ns"
+      cpucluster: 'cpu0'

boards/boards_legacy/arm/lpcxpresso55s69/Kconfig.defconfig renamed to boards/nxp/lpcxpresso55s69/Kconfig.defconfig

@@ -108,13 +108,13 @@ Targets available
 ==================
 
 The default configuration file
-``boards/arm/lpcxpresso55s69/lpcxpresso55s69_cpu0_defconfig``
+``boards/arm/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0_defconfig``
 only enables the first core.
 CPU0 is the only target that can run standalone.
 
-- *lpcxpresso55s69_cpu0* secure (S) address space for CPU0
-- *lpcxpresso55s69_ns* non-secure (NS) address space for CPU0
-- *lpcxpresso55s69_cpu1* CPU1 target, no security extensions
+- *lpcxpresso55s69/lpc55s69/cpu0* secure (S) address space for CPU0
+- *lpcxpresso55s69/lpc55s69/cpu0/ns* non-secure (NS) address space for CPU0
+- *lpcxpresso55s69/lpc55s69/cpu1* CPU1 target, no security extensions
 
 NS target for CPU0 does not work correctly without a secure image to configure
 the system, then hand execution over to the NS environment. To enable a secure
@@ -326,7 +326,7 @@ Here is an example for the :ref:`hello_world` application. This example uses the
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: lpcxpresso55s69_cpu0
+   :board: lpcxpresso55s69/lpc55s69/cpu0
    :goals: flash
 
 Open a serial terminal, reset the board (press the RESET button), and you should